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[CodeGen] Use llvm::append_range (NFC)
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7e2dc68a5f
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@ -733,8 +733,7 @@ static void collectEHScopeMembers(
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if (Visiting->isEHScopeReturnBlock())
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if (Visiting->isEHScopeReturnBlock())
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continue;
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continue;
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for (const MachineBasicBlock *Succ : Visiting->successors())
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append_range(Worklist, Visiting->successors());
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Worklist.push_back(Succ);
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}
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}
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}
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}
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@ -3714,8 +3714,7 @@ private:
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PHINode::Create(CommonType, PredCount, "sunk_phi", CurrentPhi);
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PHINode::Create(CommonType, PredCount, "sunk_phi", CurrentPhi);
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Map[Current] = PHI;
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Map[Current] = PHI;
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ST.insertNewPhi(PHI);
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ST.insertNewPhi(PHI);
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for (Value *P : CurrentPhi->incoming_values())
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append_range(Worklist, CurrentPhi->incoming_values());
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Worklist.push_back(P);
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}
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}
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}
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}
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}
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}
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@ -4969,8 +4968,7 @@ bool CodeGenPrepare::optimizeMemoryInst(Instruction *MemoryInst, Value *Addr,
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// For a PHI node, push all of its incoming values.
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// For a PHI node, push all of its incoming values.
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if (PHINode *P = dyn_cast<PHINode>(V)) {
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if (PHINode *P = dyn_cast<PHINode>(V)) {
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for (Value *IncValue : P->incoming_values())
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append_range(worklist, P->incoming_values());
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worklist.push_back(IncValue);
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PhiOrSelectSeen = true;
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PhiOrSelectSeen = true;
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continue;
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continue;
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}
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}
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@ -421,8 +421,7 @@ RegisterBankInfo::getInstrPossibleMappings(const MachineInstr &MI) const {
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// Then the alternative mapping, if any.
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// Then the alternative mapping, if any.
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InstructionMappings AltMappings = getInstrAlternativeMappings(MI);
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InstructionMappings AltMappings = getInstrAlternativeMappings(MI);
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for (const InstructionMapping *AltMapping : AltMappings)
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append_range(PossibleMappings, AltMappings);
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PossibleMappings.push_back(AltMapping);
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#ifndef NDEBUG
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#ifndef NDEBUG
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for (const InstructionMapping *Mapping : PossibleMappings)
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for (const InstructionMapping *Mapping : PossibleMappings)
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assert(Mapping->verify(MI) && "Mapping is invalid");
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assert(Mapping->verify(MI) && "Mapping is invalid");
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@ -85,9 +85,7 @@ static std::vector<MachineBasicBlock *> GetRPOList(MachineFunction &MF) {
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return {};
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return {};
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ReversePostOrderTraversal<MachineBasicBlock *> RPOT(&*MF.begin());
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ReversePostOrderTraversal<MachineBasicBlock *> RPOT(&*MF.begin());
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std::vector<MachineBasicBlock *> RPOList;
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std::vector<MachineBasicBlock *> RPOList;
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for (auto MBB : RPOT) {
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append_range(RPOList, RPOT);
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RPOList.push_back(MBB);
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}
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return RPOList;
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return RPOList;
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}
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}
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@ -748,8 +748,7 @@ bool MachineCSE::PerformCSE(MachineDomTreeNode *Node) {
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Node = WorkList.pop_back_val();
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Node = WorkList.pop_back_val();
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Scopes.push_back(Node);
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Scopes.push_back(Node);
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OpenChildren[Node] = Node->getNumChildren();
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OpenChildren[Node] = Node->getNumChildren();
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for (MachineDomTreeNode *Child : Node->children())
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append_range(WorkList, Node->children());
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WorkList.push_back(Child);
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} while (!WorkList.empty());
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} while (!WorkList.empty());
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// Now perform CSE.
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// Now perform CSE.
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@ -861,8 +860,7 @@ bool MachineCSE::PerformSimplePRE(MachineDominatorTree *DT) {
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BBs.push_back(DT->getRootNode());
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BBs.push_back(DT->getRootNode());
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do {
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do {
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auto Node = BBs.pop_back_val();
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auto Node = BBs.pop_back_val();
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for (MachineDomTreeNode *Child : Node->children())
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append_range(BBs, Node->children());
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BBs.push_back(Child);
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MachineBasicBlock *MBB = Node->getBlock();
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MachineBasicBlock *MBB = Node->getBlock();
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Changed |= ProcessBlockPRE(DT, MBB);
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Changed |= ProcessBlockPRE(DT, MBB);
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@ -631,8 +631,7 @@ void MachineRegisterInfo::setCalleeSavedRegs(ArrayRef<MCPhysReg> CSRs) {
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if (IsUpdatedCSRsInitialized)
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if (IsUpdatedCSRsInitialized)
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UpdatedCSRs.clear();
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UpdatedCSRs.clear();
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for (MCPhysReg Reg : CSRs)
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append_range(UpdatedCSRs, CSRs);
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UpdatedCSRs.push_back(Reg);
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// Zero value represents the end of the register list
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// Zero value represents the end of the register list
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// (no more registers should be pushed).
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// (no more registers should be pushed).
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@ -123,8 +123,7 @@ namespace {
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void addRegWithSubRegs(RegVector &RV, Register Reg) {
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void addRegWithSubRegs(RegVector &RV, Register Reg) {
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RV.push_back(Reg);
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RV.push_back(Reg);
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if (Reg.isPhysical())
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if (Reg.isPhysical())
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for (const MCPhysReg &SubReg : TRI->subregs(Reg.asMCReg()))
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append_range(RV, TRI->subregs(Reg.asMCReg()));
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RV.push_back(SubReg);
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}
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}
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struct BBInfo {
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struct BBInfo {
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@ -998,9 +998,7 @@ void SplitEditor::computeRedundantBackCopies(
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}
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}
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if (!DominatedVNIs.empty()) {
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if (!DominatedVNIs.empty()) {
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forceRecompute(0, *ParentVNI);
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forceRecompute(0, *ParentVNI);
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for (auto VNI : DominatedVNIs) {
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append_range(BackCopies, DominatedVNIs);
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BackCopies.push_back(VNI);
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}
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DominatedVNIs.clear();
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DominatedVNIs.clear();
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}
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}
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}
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}
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