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[CodeGen] Use llvm::append_range (NFC)

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This commit is contained in:
Kazu Hirata 2021-01-21 19:59:46 -08:00
parent 7e2dc68a5f
commit 6f30ddfaf5
8 changed files with 10 additions and 22 deletions
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3
lib/CodeGen/Analysis.cpp
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@ -733,8 +733,7 @@ static void collectEHScopeMembers(
if (Visiting->isEHScopeReturnBlock())
continue;
for (const MachineBasicBlock *Succ : Visiting->successors())
Worklist.push_back(Succ);
append_range(Worklist, Visiting->successors());
}
}

6
lib/CodeGen/CodeGenPrepare.cpp
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@ -3714,8 +3714,7 @@ private:
PHINode::Create(CommonType, PredCount, "sunk_phi", CurrentPhi);
Map[Current] = PHI;
ST.insertNewPhi(PHI);
for (Value *P : CurrentPhi->incoming_values())
Worklist.push_back(P);
append_range(Worklist, CurrentPhi->incoming_values());
}
}
}
@ -4969,8 +4968,7 @@ bool CodeGenPrepare::optimizeMemoryInst(Instruction *MemoryInst, Value *Addr,
// For a PHI node, push all of its incoming values.
if (PHINode *P = dyn_cast<PHINode>(V)) {
for (Value *IncValue : P->incoming_values())
worklist.push_back(IncValue);
append_range(worklist, P->incoming_values());
PhiOrSelectSeen = true;
continue;
}

3
lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
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@ -421,8 +421,7 @@ RegisterBankInfo::getInstrPossibleMappings(const MachineInstr &MI) const {
// Then the alternative mapping, if any.
InstructionMappings AltMappings = getInstrAlternativeMappings(MI);
for (const InstructionMapping *AltMapping : AltMappings)
PossibleMappings.push_back(AltMapping);
append_range(PossibleMappings, AltMappings);
#ifndef NDEBUG
for (const InstructionMapping *Mapping : PossibleMappings)
assert(Mapping->verify(MI) && "Mapping is invalid");

4
lib/CodeGen/MIRCanonicalizerPass.cpp
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@ -85,9 +85,7 @@ static std::vector<MachineBasicBlock *> GetRPOList(MachineFunction &MF) {
return {};
ReversePostOrderTraversal<MachineBasicBlock *> RPOT(&*MF.begin());
std::vector<MachineBasicBlock *> RPOList;
for (auto MBB : RPOT) {
RPOList.push_back(MBB);
}
append_range(RPOList, RPOT);
return RPOList;
}

6
lib/CodeGen/MachineCSE.cpp
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@ -748,8 +748,7 @@ bool MachineCSE::PerformCSE(MachineDomTreeNode *Node) {
Node = WorkList.pop_back_val();
Scopes.push_back(Node);
OpenChildren[Node] = Node->getNumChildren();
for (MachineDomTreeNode *Child : Node->children())
WorkList.push_back(Child);
append_range(WorkList, Node->children());
} while (!WorkList.empty());
// Now perform CSE.
@ -861,8 +860,7 @@ bool MachineCSE::PerformSimplePRE(MachineDominatorTree *DT) {
BBs.push_back(DT->getRootNode());
do {
auto Node = BBs.pop_back_val();
for (MachineDomTreeNode *Child : Node->children())
BBs.push_back(Child);
append_range(BBs, Node->children());
MachineBasicBlock *MBB = Node->getBlock();
Changed |= ProcessBlockPRE(DT, MBB);

3
lib/CodeGen/MachineRegisterInfo.cpp
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@ -631,8 +631,7 @@ void MachineRegisterInfo::setCalleeSavedRegs(ArrayRef<MCPhysReg> CSRs) {
if (IsUpdatedCSRsInitialized)
UpdatedCSRs.clear();
for (MCPhysReg Reg : CSRs)
UpdatedCSRs.push_back(Reg);
append_range(UpdatedCSRs, CSRs);
// Zero value represents the end of the register list
// (no more registers should be pushed).

3
lib/CodeGen/MachineVerifier.cpp
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@ -123,8 +123,7 @@ namespace {
void addRegWithSubRegs(RegVector &RV, Register Reg) {
RV.push_back(Reg);
if (Reg.isPhysical())
for (const MCPhysReg &SubReg : TRI->subregs(Reg.asMCReg()))
RV.push_back(SubReg);
append_range(RV, TRI->subregs(Reg.asMCReg()));
}
struct BBInfo {

4
lib/CodeGen/SplitKit.cpp
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@ -998,9 +998,7 @@ void SplitEditor::computeRedundantBackCopies(
}
if (!DominatedVNIs.empty()) {
forceRecompute(0, *ParentVNI);
for (auto VNI : DominatedVNIs) {
BackCopies.push_back(VNI);
}
append_range(BackCopies, DominatedVNIs);
DominatedVNIs.clear();
}
}