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unthread MMI from FastISel
llvm-svn: 100416
This commit is contained in:
parent
cfca39ef59
commit
6f3c3f60ce
@ -49,7 +49,6 @@ protected:
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SmallSet<Instruction*, 8> &CatchInfoLost;
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SmallSet<Instruction*, 8> &CatchInfoLost;
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#endif
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#endif
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MachineFunction &MF;
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MachineFunction &MF;
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MachineModuleInfo *MMI;
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MachineRegisterInfo &MRI;
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MachineRegisterInfo &MRI;
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MachineFrameInfo &MFI;
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MachineFrameInfo &MFI;
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MachineConstantPool &MCP;
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MachineConstantPool &MCP;
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@ -114,7 +113,6 @@ public:
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protected:
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protected:
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FastISel(MachineFunction &mf,
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FastISel(MachineFunction &mf,
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MachineModuleInfo *mmi,
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DenseMap<const Value *, unsigned> &vm,
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DenseMap<const Value *, unsigned> &vm,
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DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
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DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
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DenseMap<const AllocaInst *, int> &am
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DenseMap<const AllocaInst *, int> &am
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@ -47,7 +47,6 @@ namespace llvm {
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class MachineFrameInfo;
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class MachineFrameInfo;
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class MachineInstr;
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class MachineInstr;
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class MachineJumpTableInfo;
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class MachineJumpTableInfo;
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class MachineModuleInfo;
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class MCContext;
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class MCContext;
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class MCExpr;
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class MCExpr;
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class SDNode;
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class SDNode;
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@ -1272,7 +1271,7 @@ public:
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/// createFastISel - This method returns a target specific FastISel object,
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/// createFastISel - This method returns a target specific FastISel object,
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/// or null if the target does not support "fast" ISel.
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/// or null if the target does not support "fast" ISel.
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virtual FastISel *
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virtual FastISel *
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createFastISel(MachineFunction &, MachineModuleInfo *,
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createFastISel(MachineFunction &,
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DenseMap<const Value *, unsigned> &,
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DenseMap<const Value *, unsigned> &,
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DenseMap<const BasicBlock *, MachineBasicBlock *> &,
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DenseMap<const BasicBlock *, MachineBasicBlock *> &,
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DenseMap<const AllocaInst *, int> &
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DenseMap<const AllocaInst *, int> &
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@ -326,7 +326,7 @@ bool FastISel::SelectCall(User *I) {
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case Intrinsic::dbg_declare: {
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case Intrinsic::dbg_declare: {
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DbgDeclareInst *DI = cast<DbgDeclareInst>(I);
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DbgDeclareInst *DI = cast<DbgDeclareInst>(I);
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if (!DIDescriptor::ValidDebugInfo(DI->getVariable(), CodeGenOpt::None) ||
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if (!DIDescriptor::ValidDebugInfo(DI->getVariable(), CodeGenOpt::None) ||
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!MMI->hasDebugInfo())
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!MF.getMMI().hasDebugInfo())
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return true;
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return true;
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Value *Address = DI->getAddress();
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Value *Address = DI->getAddress();
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@ -340,7 +340,7 @@ bool FastISel::SelectCall(User *I) {
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if (SI == StaticAllocaMap.end()) break; // VLAs.
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if (SI == StaticAllocaMap.end()) break; // VLAs.
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int FI = SI->second;
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int FI = SI->second;
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if (!DI->getDebugLoc().isUnknown())
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if (!DI->getDebugLoc().isUnknown())
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MMI->setVariableDbgInfo(DI->getVariable(), FI, DI->getDebugLoc());
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MF.getMMI().setVariableDbgInfo(DI->getVariable(), FI, DI->getDebugLoc());
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// Building the map above is target independent. Generating DBG_VALUE
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// Building the map above is target independent. Generating DBG_VALUE
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// inline is target dependent; do this now.
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// inline is target dependent; do this now.
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@ -399,44 +399,39 @@ bool FastISel::SelectCall(User *I) {
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switch (TLI.getOperationAction(ISD::EHSELECTION, VT)) {
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switch (TLI.getOperationAction(ISD::EHSELECTION, VT)) {
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default: break;
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default: break;
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case TargetLowering::Expand: {
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case TargetLowering::Expand: {
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if (MMI) {
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if (MBB->isLandingPad())
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if (MBB->isLandingPad())
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AddCatchInfo(*cast<CallInst>(I), &MF.getMMI(), MBB);
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AddCatchInfo(*cast<CallInst>(I), MMI, MBB);
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else {
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else {
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#ifndef NDEBUG
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#ifndef NDEBUG
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CatchInfoLost.insert(cast<CallInst>(I));
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CatchInfoLost.insert(cast<CallInst>(I));
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#endif
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#endif
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// FIXME: Mark exception selector register as live in. Hack for PR1508.
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// FIXME: Mark exception selector register as live in. Hack for PR1508.
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unsigned Reg = TLI.getExceptionSelectorRegister();
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if (Reg) MBB->addLiveIn(Reg);
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}
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unsigned Reg = TLI.getExceptionSelectorRegister();
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unsigned Reg = TLI.getExceptionSelectorRegister();
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EVT SrcVT = TLI.getPointerTy();
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if (Reg) MBB->addLiveIn(Reg);
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const TargetRegisterClass *RC = TLI.getRegClassFor(SrcVT);
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unsigned ResultReg = createResultReg(RC);
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bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg, Reg,
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RC, RC);
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assert(InsertedCopy && "Can't copy address registers!");
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InsertedCopy = InsertedCopy;
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// Cast the register to the type of the selector.
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if (SrcVT.bitsGT(MVT::i32))
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ResultReg = FastEmit_r(SrcVT.getSimpleVT(), MVT::i32, ISD::TRUNCATE,
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ResultReg);
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else if (SrcVT.bitsLT(MVT::i32))
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ResultReg = FastEmit_r(SrcVT.getSimpleVT(), MVT::i32,
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ISD::SIGN_EXTEND, ResultReg);
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if (ResultReg == 0)
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// Unhandled operand. Halt "fast" selection and bail.
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return false;
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UpdateValueMap(I, ResultReg);
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} else {
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unsigned ResultReg =
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getRegForValue(Constant::getNullValue(I->getType()));
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UpdateValueMap(I, ResultReg);
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}
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}
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unsigned Reg = TLI.getExceptionSelectorRegister();
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EVT SrcVT = TLI.getPointerTy();
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const TargetRegisterClass *RC = TLI.getRegClassFor(SrcVT);
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unsigned ResultReg = createResultReg(RC);
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bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg, Reg,
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RC, RC);
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assert(InsertedCopy && "Can't copy address registers!");
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InsertedCopy = InsertedCopy;
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// Cast the register to the type of the selector.
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if (SrcVT.bitsGT(MVT::i32))
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ResultReg = FastEmit_r(SrcVT.getSimpleVT(), MVT::i32, ISD::TRUNCATE,
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ResultReg);
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else if (SrcVT.bitsLT(MVT::i32))
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ResultReg = FastEmit_r(SrcVT.getSimpleVT(), MVT::i32,
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ISD::SIGN_EXTEND, ResultReg);
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if (ResultReg == 0)
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// Unhandled operand. Halt "fast" selection and bail.
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return false;
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UpdateValueMap(I, ResultReg);
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return true;
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return true;
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}
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}
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}
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}
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@ -733,7 +728,6 @@ FastISel::SelectOperator(User *I, unsigned Opcode) {
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}
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}
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FastISel::FastISel(MachineFunction &mf,
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FastISel::FastISel(MachineFunction &mf,
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MachineModuleInfo *mmi,
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DenseMap<const Value *, unsigned> &vm,
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DenseMap<const Value *, unsigned> &vm,
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DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
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DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
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DenseMap<const AllocaInst *, int> &am
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DenseMap<const AllocaInst *, int> &am
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@ -749,7 +743,6 @@ FastISel::FastISel(MachineFunction &mf,
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CatchInfoLost(cil),
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CatchInfoLost(cil),
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#endif
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#endif
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MF(mf),
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MF(mf),
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MMI(mmi),
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MRI(MF.getRegInfo()),
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MRI(MF.getRegInfo()),
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MFI(*MF.getFrameInfo()),
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MFI(*MF.getFrameInfo()),
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MCP(*MF.getConstantPool()),
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MCP(*MF.getConstantPool()),
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@ -845,9 +845,7 @@ void SelectionDAGISel::SelectAllBasicBlocks(Function &Fn,
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// Initialize the Fast-ISel state, if needed.
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// Initialize the Fast-ISel state, if needed.
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FastISel *FastIS = 0;
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FastISel *FastIS = 0;
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if (EnableFastISel)
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if (EnableFastISel)
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FastIS = TLI.createFastISel(MF, MMI,
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FastIS = TLI.createFastISel(MF, FuncInfo->ValueMap, FuncInfo->MBBMap,
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FuncInfo->ValueMap,
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FuncInfo->MBBMap,
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FuncInfo->StaticAllocaMap
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FuncInfo->StaticAllocaMap
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#ifndef NDEBUG
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#ifndef NDEBUG
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, FuncInfo->CatchInfoLost
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, FuncInfo->CatchInfoLost
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@ -54,7 +54,6 @@ class X86FastISel : public FastISel {
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public:
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public:
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explicit X86FastISel(MachineFunction &mf,
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explicit X86FastISel(MachineFunction &mf,
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MachineModuleInfo *mmi,
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DenseMap<const Value *, unsigned> &vm,
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DenseMap<const Value *, unsigned> &vm,
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DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
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DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
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DenseMap<const AllocaInst *, int> &am
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DenseMap<const AllocaInst *, int> &am
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@ -62,7 +61,7 @@ public:
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, SmallSet<Instruction*, 8> &cil
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, SmallSet<Instruction*, 8> &cil
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#endif
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#endif
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)
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)
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: FastISel(mf, mmi, vm, bm, am
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: FastISel(mf, vm, bm, am
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#ifndef NDEBUG
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#ifndef NDEBUG
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, cil
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, cil
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#endif
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#endif
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@ -1752,7 +1751,6 @@ unsigned X86FastISel::TargetMaterializeAlloca(AllocaInst *C) {
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namespace llvm {
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namespace llvm {
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llvm::FastISel *X86::createFastISel(MachineFunction &mf,
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llvm::FastISel *X86::createFastISel(MachineFunction &mf,
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MachineModuleInfo *mmi,
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DenseMap<const Value *, unsigned> &vm,
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DenseMap<const Value *, unsigned> &vm,
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DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
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DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
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DenseMap<const AllocaInst *, int> &am
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DenseMap<const AllocaInst *, int> &am
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@ -1760,7 +1758,7 @@ namespace llvm {
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, SmallSet<Instruction*, 8> &cil
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, SmallSet<Instruction*, 8> &cil
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#endif
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#endif
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) {
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) {
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return new X86FastISel(mf, mmi, vm, bm, am
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return new X86FastISel(mf, vm, bm, am
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#ifndef NDEBUG
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#ifndef NDEBUG
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, cil
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, cil
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#endif
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#endif
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@ -2398,7 +2398,7 @@ X86TargetLowering::IsEligibleForTailCallOptimization(SDValue Callee,
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}
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}
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FastISel *
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FastISel *
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X86TargetLowering::createFastISel(MachineFunction &mf, MachineModuleInfo *mmo,
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X86TargetLowering::createFastISel(MachineFunction &mf,
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DenseMap<const Value *, unsigned> &vm,
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DenseMap<const Value *, unsigned> &vm,
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DenseMap<const BasicBlock*, MachineBasicBlock*> &bm,
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DenseMap<const BasicBlock*, MachineBasicBlock*> &bm,
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DenseMap<const AllocaInst *, int> &am
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DenseMap<const AllocaInst *, int> &am
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@ -2406,7 +2406,7 @@ X86TargetLowering::createFastISel(MachineFunction &mf, MachineModuleInfo *mmo,
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, SmallSet<Instruction*, 8> &cil
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, SmallSet<Instruction*, 8> &cil
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#endif
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#endif
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) {
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) {
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return X86::createFastISel(mf, mmo, vm, bm, am
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return X86::createFastISel(mf, vm, bm, am
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#ifndef NDEBUG
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#ifndef NDEBUG
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, cil
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, cil
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#endif
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#endif
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@ -574,7 +574,7 @@ namespace llvm {
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/// createFastISel - This method returns a target specific FastISel object,
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/// createFastISel - This method returns a target specific FastISel object,
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/// or null if the target does not support "fast" ISel.
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/// or null if the target does not support "fast" ISel.
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virtual FastISel *
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virtual FastISel *
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createFastISel(MachineFunction &mf, MachineModuleInfo *mmi,
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createFastISel(MachineFunction &mf,
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DenseMap<const Value *, unsigned> &,
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DenseMap<const Value *, unsigned> &,
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DenseMap<const BasicBlock *, MachineBasicBlock *> &,
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DenseMap<const BasicBlock *, MachineBasicBlock *> &,
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DenseMap<const AllocaInst *, int> &
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DenseMap<const AllocaInst *, int> &
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@ -815,7 +815,6 @@ namespace llvm {
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namespace X86 {
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namespace X86 {
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FastISel *createFastISel(MachineFunction &mf,
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FastISel *createFastISel(MachineFunction &mf,
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MachineModuleInfo *mmi,
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DenseMap<const Value *, unsigned> &,
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DenseMap<const Value *, unsigned> &,
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DenseMap<const BasicBlock *, MachineBasicBlock *> &,
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DenseMap<const BasicBlock *, MachineBasicBlock *> &,
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DenseMap<const AllocaInst *, int> &
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DenseMap<const AllocaInst *, int> &
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