RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-20 03:23:01 +02:00
Code Issues Projects Releases Wiki Activity

unthread MMI from FastISel

Browse Source 
llvm-svn: 100416
This commit is contained in:
Chris Lattner 2010-04-05 06:05:26 +00:00
parent cfca39ef59
commit 6f3c3f60ce
7 changed files with 38 additions and 53 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
include/llvm/CodeGen/FastISel.h
View File

@ -49,7 +49,6 @@ protected:
SmallSet<Instruction*, 8> &CatchInfoLost;
#endif
MachineFunction &MF;
MachineModuleInfo *MMI;
MachineRegisterInfo &MRI;
MachineFrameInfo &MFI;
MachineConstantPool &MCP;
@ -114,7 +113,6 @@ public:
protected:
FastISel(MachineFunction &mf,
MachineModuleInfo *mmi,
DenseMap<const Value *, unsigned> &vm,
DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
DenseMap<const AllocaInst *, int> &am

3
include/llvm/Target/TargetLowering.h
View File

@ -47,7 +47,6 @@ namespace llvm {
class MachineFrameInfo;
class MachineInstr;
class MachineJumpTableInfo;
class MachineModuleInfo;
class MCContext;
class MCExpr;
class SDNode;
@ -1272,7 +1271,7 @@ public:
/// createFastISel - This method returns a target specific FastISel object,
/// or null if the target does not support "fast" ISel.
virtual FastISel *
createFastISel(MachineFunction &, MachineModuleInfo *,
createFastISel(MachineFunction &,
DenseMap<const Value *, unsigned> &,
DenseMap<const BasicBlock *, MachineBasicBlock *> &,
DenseMap<const AllocaInst *, int> &

69
lib/CodeGen/SelectionDAG/FastISel.cpp
View File

@ -326,7 +326,7 @@ bool FastISel::SelectCall(User *I) {
case Intrinsic::dbg_declare: {
DbgDeclareInst *DI = cast<DbgDeclareInst>(I);
if (!DIDescriptor::ValidDebugInfo(DI->getVariable(), CodeGenOpt::None) ||
!MMI->hasDebugInfo())
!MF.getMMI().hasDebugInfo())
return true;
Value *Address = DI->getAddress();
@ -340,7 +340,7 @@ bool FastISel::SelectCall(User *I) {
if (SI == StaticAllocaMap.end()) break; // VLAs.
int FI = SI->second;
if (!DI->getDebugLoc().isUnknown())
MMI->setVariableDbgInfo(DI->getVariable(), FI, DI->getDebugLoc());
MF.getMMI().setVariableDbgInfo(DI->getVariable(), FI, DI->getDebugLoc());
// Building the map above is target independent. Generating DBG_VALUE
// inline is target dependent; do this now.
@ -399,44 +399,39 @@ bool FastISel::SelectCall(User *I) {
switch (TLI.getOperationAction(ISD::EHSELECTION, VT)) {
default: break;
case TargetLowering::Expand: {
if (MMI) {
if (MBB->isLandingPad())
AddCatchInfo(*cast<CallInst>(I), MMI, MBB);
else {
if (MBB->isLandingPad())
AddCatchInfo(*cast<CallInst>(I), &MF.getMMI(), MBB);
else {
#ifndef NDEBUG
CatchInfoLost.insert(cast<CallInst>(I));
CatchInfoLost.insert(cast<CallInst>(I));
#endif
// FIXME: Mark exception selector register as live in. Hack for PR1508.
unsigned Reg = TLI.getExceptionSelectorRegister();
if (Reg) MBB->addLiveIn(Reg);
}
// FIXME: Mark exception selector register as live in. Hack for PR1508.
unsigned Reg = TLI.getExceptionSelectorRegister();
EVT SrcVT = TLI.getPointerTy();
const TargetRegisterClass *RC = TLI.getRegClassFor(SrcVT);
unsigned ResultReg = createResultReg(RC);
bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg, Reg,
RC, RC);
assert(InsertedCopy && "Can't copy address registers!");
InsertedCopy = InsertedCopy;
// Cast the register to the type of the selector.
if (SrcVT.bitsGT(MVT::i32))
ResultReg = FastEmit_r(SrcVT.getSimpleVT(), MVT::i32, ISD::TRUNCATE,
ResultReg);
else if (SrcVT.bitsLT(MVT::i32))
ResultReg = FastEmit_r(SrcVT.getSimpleVT(), MVT::i32,
ISD::SIGN_EXTEND, ResultReg);
if (ResultReg == 0)
// Unhandled operand. Halt "fast" selection and bail.
return false;
UpdateValueMap(I, ResultReg);
} else {
unsigned ResultReg =
getRegForValue(Constant::getNullValue(I->getType()));
UpdateValueMap(I, ResultReg);
if (Reg) MBB->addLiveIn(Reg);
}
unsigned Reg = TLI.getExceptionSelectorRegister();
EVT SrcVT = TLI.getPointerTy();
const TargetRegisterClass *RC = TLI.getRegClassFor(SrcVT);
unsigned ResultReg = createResultReg(RC);
bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg, Reg,
RC, RC);
assert(InsertedCopy && "Can't copy address registers!");
InsertedCopy = InsertedCopy;
// Cast the register to the type of the selector.
if (SrcVT.bitsGT(MVT::i32))
ResultReg = FastEmit_r(SrcVT.getSimpleVT(), MVT::i32, ISD::TRUNCATE,
ResultReg);
else if (SrcVT.bitsLT(MVT::i32))
ResultReg = FastEmit_r(SrcVT.getSimpleVT(), MVT::i32,
ISD::SIGN_EXTEND, ResultReg);
if (ResultReg == 0)
// Unhandled operand. Halt "fast" selection and bail.
return false;
UpdateValueMap(I, ResultReg);
return true;
}
}
@ -733,7 +728,6 @@ FastISel::SelectOperator(User *I, unsigned Opcode) {
}
FastISel::FastISel(MachineFunction &mf,
MachineModuleInfo *mmi,
DenseMap<const Value *, unsigned> &vm,
DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
DenseMap<const AllocaInst *, int> &am
@ -749,7 +743,6 @@ FastISel::FastISel(MachineFunction &mf,
CatchInfoLost(cil),
#endif
MF(mf),
MMI(mmi),
MRI(MF.getRegInfo()),
MFI(*MF.getFrameInfo()),
MCP(*MF.getConstantPool()),

4
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
View File

@ -845,9 +845,7 @@ void SelectionDAGISel::SelectAllBasicBlocks(Function &Fn,
// Initialize the Fast-ISel state, if needed.
FastISel *FastIS = 0;
if (EnableFastISel)
FastIS = TLI.createFastISel(MF, MMI,
FuncInfo->ValueMap,
FuncInfo->MBBMap,
FastIS = TLI.createFastISel(MF, FuncInfo->ValueMap, FuncInfo->MBBMap,
FuncInfo->StaticAllocaMap
#ifndef NDEBUG
, FuncInfo->CatchInfoLost

6
lib/Target/X86/X86FastISel.cpp
View File

@ -54,7 +54,6 @@ class X86FastISel : public FastISel {
public:
explicit X86FastISel(MachineFunction &mf,
MachineModuleInfo *mmi,
DenseMap<const Value *, unsigned> &vm,
DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
DenseMap<const AllocaInst *, int> &am
@ -62,7 +61,7 @@ public:
, SmallSet<Instruction*, 8> &cil
#endif
)
: FastISel(mf, mmi, vm, bm, am
: FastISel(mf, vm, bm, am
#ifndef NDEBUG
, cil
#endif
@ -1752,7 +1751,6 @@ unsigned X86FastISel::TargetMaterializeAlloca(AllocaInst *C) {
namespace llvm {
llvm::FastISel *X86::createFastISel(MachineFunction &mf,
MachineModuleInfo *mmi,
DenseMap<const Value *, unsigned> &vm,
DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
DenseMap<const AllocaInst *, int> &am
@ -1760,7 +1758,7 @@ namespace llvm {
, SmallSet<Instruction*, 8> &cil
#endif
) {
return new X86FastISel(mf, mmi, vm, bm, am
return new X86FastISel(mf, vm, bm, am
#ifndef NDEBUG
, cil
#endif

4
lib/Target/X86/X86ISelLowering.cpp
View File

@ -2398,7 +2398,7 @@ X86TargetLowering::IsEligibleForTailCallOptimization(SDValue Callee,
}
FastISel *
X86TargetLowering::createFastISel(MachineFunction &mf, MachineModuleInfo *mmo,
X86TargetLowering::createFastISel(MachineFunction &mf,
DenseMap<const Value *, unsigned> &vm,
DenseMap<const BasicBlock*, MachineBasicBlock*> &bm,
DenseMap<const AllocaInst *, int> &am
@ -2406,7 +2406,7 @@ X86TargetLowering::createFastISel(MachineFunction &mf, MachineModuleInfo *mmo,
, SmallSet<Instruction*, 8> &cil
#endif
) {
return X86::createFastISel(mf, mmo, vm, bm, am
return X86::createFastISel(mf, vm, bm, am
#ifndef NDEBUG
, cil
#endif

3
lib/Target/X86/X86ISelLowering.h
View File

@ -574,7 +574,7 @@ namespace llvm {
/// createFastISel - This method returns a target specific FastISel object,
/// or null if the target does not support "fast" ISel.
virtual FastISel *
createFastISel(MachineFunction &mf, MachineModuleInfo *mmi,
createFastISel(MachineFunction &mf,
DenseMap<const Value *, unsigned> &,
DenseMap<const BasicBlock *, MachineBasicBlock *> &,
DenseMap<const AllocaInst *, int> &
@ -815,7 +815,6 @@ namespace llvm {
namespace X86 {
FastISel *createFastISel(MachineFunction &mf,
MachineModuleInfo *mmi,
DenseMap<const Value *, unsigned> &,
DenseMap<const BasicBlock *, MachineBasicBlock *> &,
DenseMap<const AllocaInst *, int> &