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IR: Fix use-list-order round-tripping for br

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Fix the use-list-order for br instructions by setting the operands in
order of their index to match the use-list-order prediction. The case
where this matters is when there is a condition but the if-true and
if-false branches are identical.

Bug was found when reviewing failures pointed at by
https://reviews.llvm.org/D104950. Fix is similar to
3cf415c6c367ced43175ebd1dc4bd9582c7f5376.

Differential Revision: https://reviews.llvm.org/D104959
This commit is contained in:
Duncan P. N. Exon Smith 2021-06-25 16:38:41 -07:00
parent 28e61dd3f9
commit 6f510dfce8
2 changed files with 19 additions and 5 deletions
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13
lib/IR/Instructions.cpp
View File

@ -1247,9 +1247,10 @@ BranchInst::BranchInst(BasicBlock *IfTrue, BasicBlock *IfFalse, Value *Cond,
: Instruction(Type::getVoidTy(IfTrue->getContext()), Instruction::Br,
OperandTraits<BranchInst>::op_end(this) - 3, 3,
InsertBefore) {
Op<-1>() = IfTrue;
Op<-2>() = IfFalse;
// Assign in order of operand index to make use-list order predictable.
Op<-3>() = Cond;
Op<-2>() = IfFalse;
Op<-1>() = IfTrue;
#ifndef NDEBUG
AssertOK();
#endif
@ -1266,9 +1267,10 @@ BranchInst::BranchInst(BasicBlock *IfTrue, BasicBlock *IfFalse, Value *Cond,
BasicBlock *InsertAtEnd)
: Instruction(Type::getVoidTy(IfTrue->getContext()), Instruction::Br,
OperandTraits<BranchInst>::op_end(this) - 3, 3, InsertAtEnd) {
Op<-1>() = IfTrue;
Op<-2>() = IfFalse;
// Assign in order of operand index to make use-list order predictable.
Op<-3>() = Cond;
Op<-2>() = IfFalse;
Op<-1>() = IfTrue;
#ifndef NDEBUG
AssertOK();
#endif
@ -1278,12 +1280,13 @@ BranchInst::BranchInst(const BranchInst &BI)
: Instruction(Type::getVoidTy(BI.getContext()), Instruction::Br,
OperandTraits<BranchInst>::op_end(this) - BI.getNumOperands(),
BI.getNumOperands()) {
Op<-1>() = BI.Op<-1>();
// Assign in order of operand index to make use-list order predictable.
if (BI.getNumOperands() != 1) {
assert(BI.getNumOperands() == 3 && "BR can have 1 or 3 operands!");
Op<-3>() = BI.Op<-3>();
Op<-2>() = BI.Op<-2>();
}
Op<-1>() = BI.Op<-1>();
SubclassOptionalData = BI.SubclassOptionalData;
}

11
test/Assembler/br-single-destination.ll Normal file
View File

@ -0,0 +1,11 @@
; RUN: llvm-as < %s -disable-output 2>&1 | FileCheck %s -allow-empty
; CHECK-NOT: error
; CHECK-NOT: warning
; RUN: verify-uselistorder < %s
define void @f1(i1 %cmp) {
entry:
br i1 %cmp, label %branch, label %branch
branch:
unreachable
}