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[X86] Suppress load folding for add/sub with 128 immediate.

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128 won't fit in a sign extended 8-bit immediate, but we can negate it to -128 and use the other operation. This results in a shorter encoding since the move would have used 16 or 32 bits for the immediate.

llvm-svn: 355484
This commit is contained in:
Craig Topper 2019-03-06 07:36:36 +00:00
parent 8915d92df3
commit 6f5194b3c8
3 changed files with 20 additions and 14 deletions
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6
lib/Target/X86/X86ISelDAGToDAG.cpp
View File

@ -583,6 +583,12 @@ X86DAGToDAGISel::IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const {
Imm->getAPIntValue().getBitWidth() == 64 &&
Imm->getAPIntValue().isIntN(32))
return false;
// ADD/SUB with can negate the immediate and use the opposite operation
// to fit 128 into a sign extended 8 bit immediate.
if ((U->getOpcode() == ISD::ADD || U->getOpcode() == ISD::SUB) &&
(-Imm->getAPIntValue()).isSignedIntN(8))
return false;
}
// If the other operand is a TLS address, we should fold it instead.

16
test/CodeGen/X86/lack-of-signed-truncation-check.ll
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@ -485,8 +485,8 @@ define i1 @add_ugecmp_bad_i16_i8_add(i16 %x, i16 %y) nounwind {
define i1 @add_ugecmp_bad_i16_i8_cmp(i16 %x, i16 %y) nounwind {
; X86-LABEL: add_ugecmp_bad_i16_i8_cmp:
; X86: # %bb.0:
; X86-NEXT: movl $128, %eax
; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: subl $-128, %eax
; X86-NEXT: cmpw {{[0-9]+}}(%esp), %ax
; X86-NEXT: setae %al
; X86-NEXT: retl
@ -506,8 +506,8 @@ define i1 @add_ugecmp_bad_i16_i8_cmp(i16 %x, i16 %y) nounwind {
define i1 @add_ugecmp_bad_i8_i16(i16 %x) nounwind {
; X86-LABEL: add_ugecmp_bad_i8_i16:
; X86: # %bb.0:
; X86-NEXT: movl $128, %eax
; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: subl $-128, %eax
; X86-NEXT: cmpw $127, %ax
; X86-NEXT: seta %al
; X86-NEXT: retl
@ -550,8 +550,8 @@ define i1 @add_ugecmp_bad_i16_i8_c0notpoweroftwo(i16 %x) nounwind {
define i1 @add_ugecmp_bad_i16_i8_c1notpoweroftwo(i16 %x) nounwind {
; X86-LABEL: add_ugecmp_bad_i16_i8_c1notpoweroftwo:
; X86: # %bb.0:
; X86-NEXT: movl $128, %eax
; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: subl $-128, %eax
; X86-NEXT: movzwl %ax, %eax
; X86-NEXT: cmpl $767, %eax # imm = 0x2FF
; X86-NEXT: seta %al
@ -617,8 +617,8 @@ define i1 @add_ugecmp_bad_i16_i4(i16 %x) nounwind {
define i1 @add_ugecmp_bad_i24_i8(i24 %x) nounwind {
; X86-LABEL: add_ugecmp_bad_i24_i8:
; X86: # %bb.0:
; X86-NEXT: movl $128, %eax
; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: subl $-128, %eax
; X86-NEXT: andl $16777215, %eax # imm = 0xFFFFFF
; X86-NEXT: cmpl $255, %eax
; X86-NEXT: seta %al

12
test/CodeGen/X86/signed-truncation-check.ll
View File

@ -485,8 +485,8 @@ define i1 @add_ultcmp_bad_i16_i8_add(i16 %x, i16 %y) nounwind {
define i1 @add_ultcmp_bad_i16_i8_cmp(i16 %x, i16 %y) nounwind {
; X86-LABEL: add_ultcmp_bad_i16_i8_cmp:
; X86: # %bb.0:
; X86-NEXT: movl $128, %eax
; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: subl $-128, %eax
; X86-NEXT: cmpw {{[0-9]+}}(%esp), %ax
; X86-NEXT: setb %al
; X86-NEXT: retl
@ -548,8 +548,8 @@ define i1 @add_ultcmp_bad_i16_i8_c0notpoweroftwo(i16 %x) nounwind {
define i1 @add_ultcmp_bad_i16_i8_c1notpoweroftwo(i16 %x) nounwind {
; X86-LABEL: add_ultcmp_bad_i16_i8_c1notpoweroftwo:
; X86: # %bb.0:
; X86-NEXT: movl $128, %eax
; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: subl $-128, %eax
; X86-NEXT: movzwl %ax, %eax
; X86-NEXT: cmpl $768, %eax # imm = 0x300
; X86-NEXT: setb %al
@ -615,8 +615,8 @@ define i1 @add_ultcmp_bad_i16_i4(i16 %x) nounwind {
define i1 @add_ultcmp_bad_i24_i8(i24 %x) nounwind {
; X86-LABEL: add_ultcmp_bad_i24_i8:
; X86: # %bb.0:
; X86-NEXT: movl $128, %eax
; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: subl $-128, %eax
; X86-NEXT: andl $16777215, %eax # imm = 0xFFFFFF
; X86-NEXT: cmpl $256, %eax # imm = 0x100
; X86-NEXT: setb %al