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[LiveDebugValues] Speed up removeEntryValue, NFC
Summary:
Instead of iterating over all VarLoc IDs in removeEntryValue(), just
iterate over the interval reserved for entry value VarLocs. This changes
the iteration order, hence the test update -- otherwise this is NFC.
This appears to give an ~8.5x wall time speed-up for LiveDebugValues when
compiling sqlite3.c 3.30.1 with a Release clang (on my machine):
```
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name ---
Before: 2.5402 ( 18.8%) 0.0050 ( 0.4%) 2.5452 ( 17.3%) 2.5452 ( 17.3%) Live DEBUG_VALUE analysis
After: 0.2364 ( 2.1%) 0.0034 ( 0.3%) 0.2399 ( 2.0%) 0.2398 ( 2.0%) Live DEBUG_VALUE analysis
```
The change in removeEntryValue() is the only one that appears to affect
wall time, but for consistency (and to resolve a pending TODO), I made
the analogous changes for iterating over SpillLocKind VarLocs.
Reviewers: nikic, aprantl, jmorse, djtodoro
Subscribers: hiraditya, dexonsmith, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D80684
This commit is contained in:
Vedant Kumar
parent
0ba1ec26dd
commit
6f84fd7763
@ -16,6 +16,7 @@
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#include "llvm/ADT/IntervalMap.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/iterator_range.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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@ -352,6 +353,19 @@ public:
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return It;
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}
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/// Return a range iterator which iterates over all of the set bits in the
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/// half-open range [Start, End).
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iterator_range<const_iterator> half_open_range(IndexT Start,
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IndexT End) const {
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assert(Start < End && "Not a valid range");
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auto StartIt = find(Start);
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if (StartIt == end() || *StartIt >= End)
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return {end(), end()};
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auto EndIt = StartIt;
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EndIt.advanceToLowerBound(End);
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return {StartIt, EndIt};
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}
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void print(raw_ostream &OS) const {
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OS << "{";
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for (auto It = Intervals.begin(), End = Intervals.end(); It != End;
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@ -137,16 +137,24 @@ using VarLocSet = CoalescingBitVector<uint64_t>;
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/// Why encode a location /into/ the VarLocMap index? This makes it possible
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/// to find the open VarLocs killed by a register def very quickly. This is a
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/// performance-critical operation for LiveDebugValues.
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///
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/// TODO: Consider adding reserved intervals for kinds of VarLocs other than
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/// RegisterKind, like SpillLocKind or EntryValueKind, to optimize iteration
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/// over open locations.
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struct LocIndex {
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uint32_t Location; // Physical registers live in the range [1;2^30) (see
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// \ref MCRegister), so we have plenty of range left here
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// to encode non-register locations.
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uint32_t Index;
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/// The first location greater than 0 that is not reserved for VarLocs of
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/// kind RegisterKind.
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static constexpr uint32_t kFirstInvalidRegLocation = 1 << 30;
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/// A special location reserved for VarLocs of kind SpillLocKind.
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static constexpr uint32_t kSpillLocation = kFirstInvalidRegLocation;
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/// A special location reserved for VarLocs of kind EntryValueBackupKind and
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/// EntryValueCopyBackupKind.
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static constexpr uint32_t kEntryValueBackupLocation =
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kFirstInvalidRegLocation + 1;
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LocIndex(uint32_t Location, uint32_t Index)
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: Location(Location), Index(Index) {}
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@ -166,6 +174,14 @@ struct LocIndex {
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static uint64_t rawIndexForReg(uint32_t Reg) {
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return LocIndex(Reg, 0).getAsRawInteger();
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}
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/// Return a range covering all set indices in the interval reserved for
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/// \p Location in \p Set.
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static auto indexRangeForLocation(const VarLocSet &Set, uint32_t Location) {
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uint64_t Start = LocIndex(Location, 0).getAsRawInteger();
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uint64_t End = LocIndex(Location + 1, 0).getAsRawInteger();
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return Set.half_open_range(Start, End);
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}
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};
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class LiveDebugValues : public MachineFunctionPass {
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@ -211,6 +227,9 @@ private:
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bool operator==(const SpillLoc &Other) const {
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return SpillBase == Other.SpillBase && SpillOffset == Other.SpillOffset;
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}
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bool operator!=(const SpillLoc &Other) const {
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return !(*this == Other);
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}
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};
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/// Identity of the variable at this location.
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@ -477,10 +496,27 @@ private:
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/// location.
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SmallDenseMap<uint32_t, std::vector<VarLoc>> Loc2Vars;
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/// Determine the 32-bit location reserved for \p VL, based on its kind.
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static uint32_t getLocationForVar(const VarLoc &VL) {
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switch (VL.Kind) {
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case VarLoc::RegisterKind:
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assert((VL.Loc.RegNo < LocIndex::kFirstInvalidRegLocation) &&
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"Physreg out of range?");
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return VL.Loc.RegNo;
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case VarLoc::SpillLocKind:
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return LocIndex::kSpillLocation;
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case VarLoc::EntryValueBackupKind:
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case VarLoc::EntryValueCopyBackupKind:
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return LocIndex::kEntryValueBackupLocation;
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default:
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return 0;
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}
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}
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public:
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/// Retrieve a unique LocIndex for \p VL.
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LocIndex insert(const VarLoc &VL) {
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uint32_t Location = VL.isDescribedByReg();
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uint32_t Location = getLocationForVar(VL);
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uint32_t &Index = Var2Index[VL];
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if (!Index) {
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auto &Vars = Loc2Vars[Location];
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@ -577,6 +613,30 @@ private:
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"open ranges are inconsistent");
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return VarLocs.empty();
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}
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/// Get an empty range of VarLoc IDs.
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auto getEmptyVarLocRange() const {
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return iterator_range<VarLocSet::const_iterator>(getVarLocs().end(),
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getVarLocs().end());
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}
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/// Get all set IDs for VarLocs of kind RegisterKind in \p Reg.
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auto getRegisterVarLocs(Register Reg) const {
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return LocIndex::indexRangeForLocation(getVarLocs(), Reg);
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}
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/// Get all set IDs for VarLocs of kind SpillLocKind.
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auto getSpillVarLocs() const {
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return LocIndex::indexRangeForLocation(getVarLocs(),
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LocIndex::kSpillLocation);
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}
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/// Get all set IDs for VarLocs of kind EntryValueBackupKind or
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/// EntryValueCopyBackupKind.
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auto getEntryValueBackupVarLocs() const {
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return LocIndex::indexRangeForLocation(
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getVarLocs(), LocIndex::kEntryValueBackupLocation);
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}
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};
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/// Collect all VarLoc IDs from \p CollectFrom for VarLocs of kind
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@ -821,7 +881,10 @@ void LiveDebugValues::getUsedRegs(const VarLocSet &CollectFrom,
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// All register-based VarLocs are assigned indices greater than or equal to
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// FirstRegIndex.
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uint64_t FirstRegIndex = LocIndex::rawIndexForReg(1);
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for (auto It = CollectFrom.find(FirstRegIndex), End = CollectFrom.end();
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uint64_t FirstInvalidIndex =
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LocIndex::rawIndexForReg(LocIndex::kFirstInvalidRegLocation);
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for (auto It = CollectFrom.find(FirstRegIndex),
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End = CollectFrom.find(FirstInvalidIndex);
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It != End;) {
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// We found a VarLoc ID for a VarLoc that lives in a register. Figure out
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// which register and add it to UsedRegs.
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@ -924,11 +987,8 @@ bool LiveDebugValues::removeEntryValue(const MachineInstr &MI,
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}
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if (TrySalvageEntryValue) {
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for (uint64_t ID : OpenRanges.getVarLocs()) {
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for (uint64_t ID : OpenRanges.getEntryValueBackupVarLocs()) {
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const VarLoc &VL = VarLocIDs[LocIndex::fromRawInteger(ID)];
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if (!VL.isEntryBackupLoc())
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continue;
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if (VL.getEntryValueCopyBackupReg() == Reg &&
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VL.MI.getOperand(0).getReg() == SrcRegOp->getReg())
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return false;
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@ -1259,10 +1319,11 @@ void LiveDebugValues::transferSpillOrRestoreInst(MachineInstr &MI,
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VarLocSet KillSet(Alloc);
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if (isSpillInstruction(MI, MF)) {
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Loc = extractSpillBaseRegAndOffset(MI);
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for (uint64_t ID : OpenRanges.getVarLocs()) {
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for (uint64_t ID : OpenRanges.getSpillVarLocs()) {
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LocIndex Idx = LocIndex::fromRawInteger(ID);
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const VarLoc &VL = VarLocIDs[Idx];
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if (VL.Kind == VarLoc::SpillLocKind && VL.Loc.SpillLocation == *Loc) {
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assert(VL.Kind == VarLoc::SpillLocKind && "Broken VarLocSet?");
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if (VL.Loc.SpillLocation == *Loc) {
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// This location is overwritten by the current instruction -- terminate
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// the open range, and insert an explicit DBG_VALUE $noreg.
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//
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@ -1298,21 +1359,31 @@ void LiveDebugValues::transferSpillOrRestoreInst(MachineInstr &MI,
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<< "\n");
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}
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// Check if the register or spill location is the location of a debug value.
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for (uint64_t ID : OpenRanges.getVarLocs()) {
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auto TransferCandidates = OpenRanges.getEmptyVarLocRange();
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if (TKind == TransferKind::TransferSpill)
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TransferCandidates = OpenRanges.getRegisterVarLocs(Reg);
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else if (TKind == TransferKind::TransferRestore)
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TransferCandidates = OpenRanges.getSpillVarLocs();
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for (uint64_t ID : TransferCandidates) {
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LocIndex Idx = LocIndex::fromRawInteger(ID);
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const VarLoc &VL = VarLocIDs[Idx];
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if (TKind == TransferKind::TransferSpill && VL.isDescribedByReg() == Reg) {
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if (TKind == TransferKind::TransferSpill) {
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assert(VL.isDescribedByReg() == Reg && "Broken VarLocSet?");
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LLVM_DEBUG(dbgs() << "Spilling Register " << printReg(Reg, TRI) << '('
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<< VL.Var.getVariable()->getName() << ")\n");
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} else if (TKind == TransferKind::TransferRestore &&
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VL.Kind == VarLoc::SpillLocKind &&
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VL.Loc.SpillLocation == *Loc) {
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} else {
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assert(TKind == TransferKind::TransferRestore &&
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VL.Kind == VarLoc::SpillLocKind && "Broken VarLocSet?");
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if (VL.Loc.SpillLocation != *Loc)
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// The spill location is not the location of a debug value.
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continue;
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LLVM_DEBUG(dbgs() << "Restoring Register " << printReg(Reg, TRI) << '('
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<< VL.Var.getVariable()->getName() << ")\n");
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} else
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continue;
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}
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insertTransferDebugPair(MI, OpenRanges, Transfers, VarLocIDs, Idx, TKind,
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Reg);
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// FIXME: A comment should explain why it's correct to return early here,
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// if that is in fact correct.
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return;
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}
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}
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@ -1356,7 +1427,7 @@ void LiveDebugValues::transferRegisterCopy(MachineInstr &MI,
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// a parameter describing only a moving of the value around, rather then
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// modifying it, we are still able to use the entry value if needed.
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if (isRegOtherThanSPAndFP(*DestRegOp, MI, TRI)) {
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for (uint64_t ID : OpenRanges.getVarLocs()) {
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for (uint64_t ID : OpenRanges.getEntryValueBackupVarLocs()) {
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LocIndex Idx = LocIndex::fromRawInteger(ID);
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const VarLoc &VL = VarLocIDs[Idx];
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if (VL.getEntryValueBackupReg() == SrcReg) {
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@ -1378,13 +1449,14 @@ void LiveDebugValues::transferRegisterCopy(MachineInstr &MI,
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if (!SrcRegOp->isKill())
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return;
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for (uint64_t ID : OpenRanges.getVarLocs()) {
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for (uint64_t ID : OpenRanges.getRegisterVarLocs(SrcReg)) {
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LocIndex Idx = LocIndex::fromRawInteger(ID);
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if (VarLocIDs[Idx].isDescribedByReg() == SrcReg) {
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insertTransferDebugPair(MI, OpenRanges, Transfers, VarLocIDs, Idx,
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TransferKind::TransferCopy, DestReg);
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return;
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}
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assert(VarLocIDs[Idx].isDescribedByReg() == SrcReg && "Broken VarLocSet?");
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insertTransferDebugPair(MI, OpenRanges, Transfers, VarLocIDs, Idx,
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TransferKind::TransferCopy, DestReg);
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// FIXME: A comment should explain why it's correct to return early here,
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// if that is in fact correct.
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return;
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}
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}
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@ -23,9 +23,9 @@
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# CHECK-NEXT: $ebx = MOV32ri 2
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# CHECK-NEXT: DBG_VALUE $esi, $noreg, ![[ARG_B]], !DIExpression(DW_OP_LLVM_entry_value, 1)
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# CHECK: bb.3.if.end
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# CHECK-NEXT: DBG_VALUE $edx, $noreg, ![[ARG_Q]], !DIExpression()
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# CHECK-NEXT: DBG_VALUE $ebp, $noreg, ![[ARG_C]], !DIExpression()
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# CHECK-NEXT: DBG_VALUE $esi, $noreg, ![[ARG_B]], !DIExpression(DW_OP_LLVM_entry_value, 1)
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# CHECK-DAG: DBG_VALUE $edx, $noreg, ![[ARG_Q]], !DIExpression()
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# CHECK-DAG: DBG_VALUE $ebp, $noreg, ![[ARG_C]], !DIExpression()
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# CHECK-DAG: DBG_VALUE $esi, $noreg, ![[ARG_B]], !DIExpression(DW_OP_LLVM_entry_value, 1)
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--- |
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; ModuleID = 'test.c'
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source_filename = "test.c"
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@ -31,6 +31,11 @@ bool elementsMatch(const UBitVec &BV, std::initializer_list<unsigned> List) {
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return true;
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}
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bool rangesMatch(iterator_range<UBitVec::const_iterator> R,
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std::initializer_list<unsigned> List) {
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return std::equal(R.begin(), R.end(), List.begin(), List.end());
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}
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TEST(CoalescingBitVectorTest, Set) {
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UBitVec::Allocator Alloc;
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UBitVec BV1(Alloc);
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@ -486,6 +491,56 @@ TEST(CoalescingBitVectorTest, AdvanceToLowerBound) {
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EXPECT_TRUE(It == BV.end());
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}
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TEST(CoalescingBitVectorTest, HalfOpenRange) {
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UBitVec::Allocator Alloc;
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{
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UBitVec BV(Alloc);
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BV.set({1, 2, 3});
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EXPECT_EQ(*BV.find(0), 1U); // find(Start) > Start
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EXPECT_TRUE(rangesMatch(BV.half_open_range(0, 5), {1, 2, 3}));
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EXPECT_TRUE(rangesMatch(BV.half_open_range(1, 4), {1, 2, 3}));
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EXPECT_TRUE(rangesMatch(BV.half_open_range(1, 3), {1, 2}));
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EXPECT_TRUE(rangesMatch(BV.half_open_range(2, 3), {2}));
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EXPECT_TRUE(rangesMatch(BV.half_open_range(2, 4), {2, 3}));
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EXPECT_TRUE(rangesMatch(BV.half_open_range(4, 5), {}));
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}
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{
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UBitVec BV(Alloc);
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BV.set({1, 2, 11, 12});
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EXPECT_TRUE(rangesMatch(BV.half_open_range(0, 15), {1, 2, 11, 12}));
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EXPECT_TRUE(rangesMatch(BV.half_open_range(1, 13), {1, 2, 11, 12}));
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EXPECT_TRUE(rangesMatch(BV.half_open_range(1, 12), {1, 2, 11}));
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EXPECT_TRUE(rangesMatch(BV.half_open_range(0, 5), {1, 2}));
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EXPECT_TRUE(rangesMatch(BV.half_open_range(1, 5), {1, 2}));
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EXPECT_TRUE(rangesMatch(BV.half_open_range(2, 5), {2}));
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EXPECT_TRUE(rangesMatch(BV.half_open_range(1, 2), {1}));
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EXPECT_TRUE(rangesMatch(BV.half_open_range(13, 14), {}));
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EXPECT_TRUE(rangesMatch(BV.half_open_range(2, 10), {2}));
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}
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{
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UBitVec BV(Alloc);
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BV.set({1});
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EXPECT_EQ(*BV.find(0), 1U); // find(Start) == End
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EXPECT_TRUE(rangesMatch(BV.half_open_range(0, 1), {}));
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}
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{
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UBitVec BV(Alloc);
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BV.set({5});
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EXPECT_EQ(*BV.find(3), 5U); // find(Start) > End
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EXPECT_TRUE(rangesMatch(BV.half_open_range(3, 4), {}));
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}
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}
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TEST(CoalescingBitVectorTest, Print) {
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std::string S;
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{
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