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Relocation enablement for PPC DAG postprocessing pass

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llvm-svn: 175693
This commit is contained in:
Bill Schmidt 2013-02-21 00:05:29 +00:00
parent de0b3ec9fc
commit 6f94fdaed4
4 changed files with 37 additions and 11 deletions
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16
lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
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@ -151,7 +151,21 @@ unsigned PPCELFObjectWriter::getRelocTypeInner(const MCValue &Target,
Type = ELF::R_PPC64_TOC; Type = ELF::R_PPC64_TOC;
break; break;
case PPC::fixup_ppc_toc16: case PPC::fixup_ppc_toc16:
Type = ELF::R_PPC64_TOC16; switch (Modifier) {
default: llvm_unreachable("Unsupported Modifier");
case MCSymbolRefExpr::VK_PPC_DTPREL16_LO:
Type = ELF::R_PPC64_DTPREL16_LO;
break;
case MCSymbolRefExpr::VK_None:
Type = ELF::R_PPC64_TOC16;
break;
case MCSymbolRefExpr::VK_PPC_TOC16_LO:
Type = ELF::R_PPC64_TOC16_LO;
break;
case MCSymbolRefExpr::VK_PPC_GOT_TLSLD16_LO:
Type = ELF::R_PPC64_GOT_TLSLD16_LO;
break;
}
break; break;
case PPC::fixup_ppc_toc16_ds: case PPC::fixup_ppc_toc16_ds:
switch (Modifier) { switch (Modifier) {

22
lib/Target/PowerPC/PPC.h
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@ -57,26 +57,32 @@ namespace llvm {
/// MO_PIC_FLAG - If this bit is set, the symbol reference is relative to /// MO_PIC_FLAG - If this bit is set, the symbol reference is relative to
/// the function's picbase, e.g. lo16(symbol-picbase). /// the function's picbase, e.g. lo16(symbol-picbase).
MO_PIC_FLAG = 4, MO_PIC_FLAG = 2,
/// MO_NLP_FLAG - If this bit is set, the symbol reference is actually to /// MO_NLP_FLAG - If this bit is set, the symbol reference is actually to
/// the non_lazy_ptr for the global, e.g. lo16(symbol$non_lazy_ptr-picbase). /// the non_lazy_ptr for the global, e.g. lo16(symbol$non_lazy_ptr-picbase).
MO_NLP_FLAG = 8, MO_NLP_FLAG = 4,
/// MO_NLP_HIDDEN_FLAG - If this bit is set, the symbol reference is to a /// MO_NLP_HIDDEN_FLAG - If this bit is set, the symbol reference is to a
/// symbol with hidden visibility. This causes a different kind of /// symbol with hidden visibility. This causes a different kind of
/// non-lazy-pointer to be generated. /// non-lazy-pointer to be generated.
MO_NLP_HIDDEN_FLAG = 16, MO_NLP_HIDDEN_FLAG = 8,
/// The next are not flags but distinct values. /// The next are not flags but distinct values.
MO_ACCESS_MASK = 0xe0, MO_ACCESS_MASK = 0xf0,
/// MO_LO16, MO_HA16 - lo16(symbol) and ha16(symbol) /// MO_LO16, MO_HA16 - lo16(symbol) and ha16(symbol)
MO_LO16 = 1 << 5, MO_LO16 = 1 << 4,
MO_HA16 = 2 << 5, MO_HA16 = 2 << 4,
MO_TPREL16_HA = 3 << 5, MO_TPREL16_HA = 3 << 4,
MO_TPREL16_LO = 4 << 5 MO_TPREL16_LO = 4 << 4,
/// These values identify relocations on immediates folded
/// into memory operations.
MO_DTPREL16_LO = 5 << 4,
MO_TLSLD16_LO = 6 << 4,
MO_TOC16_LO = 7 << 4
}; };
} // end namespace PPCII } // end namespace PPCII

4
lib/Target/PowerPC/PPCInstrInfo.td
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@ -346,7 +346,7 @@ def crbitm: Operand<i8> {
// Address operands // Address operands
def memri : Operand<iPTR> { def memri : Operand<iPTR> {
let PrintMethod = "printMemRegImm"; let PrintMethod = "printMemRegImm";
let MIOperandInfo = (ops i32imm:$imm, ptr_rc:$reg); let MIOperandInfo = (ops symbolLo:$imm, ptr_rc:$reg);
let EncoderMethod = "getMemRIEncoding"; let EncoderMethod = "getMemRIEncoding";
} }
def memrr : Operand<iPTR> { def memrr : Operand<iPTR> {
@ -355,7 +355,7 @@ def memrr : Operand<iPTR> {
} }
def memrix : Operand<iPTR> { // memri where the imm is shifted 2 bits. def memrix : Operand<iPTR> { // memri where the imm is shifted 2 bits.
let PrintMethod = "printMemRegImmShifted"; let PrintMethod = "printMemRegImmShifted";
let MIOperandInfo = (ops i32imm:$imm, ptr_rc:$reg); let MIOperandInfo = (ops symbolLo:$imm, ptr_rc:$reg);
let EncoderMethod = "getMemRIXEncoding"; let EncoderMethod = "getMemRIXEncoding";
} }

6
lib/Target/PowerPC/PPCMCInstLower.cpp
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@ -115,6 +115,12 @@ static MCOperand GetSymbolRef(const MachineOperand &MO, const MCSymbol *Symbol,
break; break;
case PPCII::MO_TPREL16_LO: RefKind = MCSymbolRefExpr::VK_PPC_TPREL16_LO; case PPCII::MO_TPREL16_LO: RefKind = MCSymbolRefExpr::VK_PPC_TPREL16_LO;
break; break;
case PPCII::MO_DTPREL16_LO: RefKind = MCSymbolRefExpr::VK_PPC_DTPREL16_LO;
break;
case PPCII::MO_TLSLD16_LO: RefKind = MCSymbolRefExpr::VK_PPC_GOT_TLSLD16_LO;
break;
case PPCII::MO_TOC16_LO: RefKind = MCSymbolRefExpr::VK_PPC_TOC16_LO;
break;
} }
// FIXME: This isn't right, but we don't have a good way to express this in // FIXME: This isn't right, but we don't have a good way to express this in