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These instructions are now autogenerated
llvm-svn: 23751
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114941504c
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6f97b0bb81
@ -1276,34 +1276,6 @@ SDOperand PPC32DAGToDAGISel::Select(SDOperand Op) {
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Select(N->getOperand(1)));
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Select(N->getOperand(1)));
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return SDOperand(N, 0);
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return SDOperand(N, 0);
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}
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}
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case ISD::SRA: {
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unsigned Imm;
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if (isIntImmediate(N->getOperand(1), Imm))
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CurDAG->SelectNodeTo(N, PPC::SRAWI, MVT::i32, Select(N->getOperand(0)),
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getI32Imm(Imm));
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else
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CurDAG->SelectNodeTo(N, PPC::SRAW, MVT::i32, Select(N->getOperand(0)),
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Select(N->getOperand(1)));
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return SDOperand(N, 0);
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}
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case ISD::FMUL: {
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unsigned Opc = N->getValueType(0) == MVT::f32 ? PPC::FMULS : PPC::FMUL;
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CurDAG->SelectNodeTo(N, Opc, N->getValueType(0), Select(N->getOperand(0)),
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Select(N->getOperand(1)));
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return SDOperand(N, 0);
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}
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case ISD::FDIV: {
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unsigned Opc = N->getValueType(0) == MVT::f32 ? PPC::FDIVS : PPC::FDIV;
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CurDAG->SelectNodeTo(N, Opc, N->getValueType(0), Select(N->getOperand(0)),
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Select(N->getOperand(1)));
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return SDOperand(N, 0);
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}
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case ISD::FABS:
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if (N->getValueType(0) == MVT::f32)
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CurDAG->SelectNodeTo(N, PPC::FABSS, MVT::f32, Select(N->getOperand(0)));
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else
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CurDAG->SelectNodeTo(N, PPC::FABSD, MVT::f64, Select(N->getOperand(0)));
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return SDOperand(N, 0);
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case ISD::FNEG: {
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case ISD::FNEG: {
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SDOperand Val = Select(N->getOperand(0));
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SDOperand Val = Select(N->getOperand(0));
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MVT::ValueType Ty = N->getValueType(0);
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MVT::ValueType Ty = N->getValueType(0);
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@ -1336,12 +1308,6 @@ SDOperand PPC32DAGToDAGISel::Select(SDOperand Op) {
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CurDAG->SelectNodeTo(N, PPC::FNEGD, MVT::f64, Val);
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CurDAG->SelectNodeTo(N, PPC::FNEGD, MVT::f64, Val);
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return SDOperand(N, 0);
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return SDOperand(N, 0);
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}
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}
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case ISD::FSQRT: {
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MVT::ValueType Ty = N->getValueType(0);
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CurDAG->SelectNodeTo(N, Ty == MVT::f64 ? PPC::FSQRT : PPC::FSQRTS, Ty,
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Select(N->getOperand(0)));
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return SDOperand(N, 0);
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}
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case ISD::LOAD:
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case ISD::LOAD:
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case ISD::EXTLOAD:
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case ISD::EXTLOAD:
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case ISD::ZEXTLOAD:
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case ISD::ZEXTLOAD:
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