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Add aliases for pblendvb, blendvpd, and blendvps instructions with the implicit xmm0 operand specified. Fixes PR13252.

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llvm-svn: 159644
This commit is contained in:
Craig Topper 2012-07-03 05:49:45 +00:00
parent 33e15f03ee
commit 6fcb4454a0
2 changed files with 45 additions and 5 deletions
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24
lib/Target/X86/X86InstrSSE.td
View File

@ -6703,7 +6703,7 @@ let Predicates = [HasAVX2] in {
/// SS41I_ternary_int - SSE 4.1 ternary operator
let Uses = [XMM0], Constraints = "$src1 = $dst" in {
multiclass SS41I_ternary_int<bits<8> opc, string OpcodeStr, PatFrag mem_frag,
Intrinsic IntId> {
X86MemOperand x86memop, Intrinsic IntId> {
def rr0 : SS48I<opc, MRMSrcReg, (outs VR128:$dst),
(ins VR128:$src1, VR128:$src2),
!strconcat(OpcodeStr,
@ -6712,7 +6712,7 @@ let Uses = [XMM0], Constraints = "$src1 = $dst" in {
OpSize;
def rm0 : SS48I<opc, MRMSrcMem, (outs VR128:$dst),
(ins VR128:$src1, i128mem:$src2),
(ins VR128:$src1, x86memop:$src2),
!strconcat(OpcodeStr,
"\t{$src2, $dst|$dst, $src2}"),
[(set VR128:$dst,
@ -6722,14 +6722,28 @@ let Uses = [XMM0], Constraints = "$src1 = $dst" in {
}
let ExeDomain = SSEPackedDouble in
defm BLENDVPD : SS41I_ternary_int<0x15, "blendvpd", memopv2f64,
defm BLENDVPD : SS41I_ternary_int<0x15, "blendvpd", memopv2f64, f128mem,
int_x86_sse41_blendvpd>;
let ExeDomain = SSEPackedSingle in
defm BLENDVPS : SS41I_ternary_int<0x14, "blendvps", memopv4f32,
defm BLENDVPS : SS41I_ternary_int<0x14, "blendvps", memopv4f32, f128mem,
int_x86_sse41_blendvps>;
defm PBLENDVB : SS41I_ternary_int<0x10, "pblendvb", memopv2i64,
defm PBLENDVB : SS41I_ternary_int<0x10, "pblendvb", memopv2i64, i128mem,
int_x86_sse41_pblendvb>;
// Aliases with the implicit xmm0 argument
def : InstAlias <"blendvpd\t{%xmm0, $src2, $dst|$dst, $src2, %xmm0}",
(BLENDVPDrr0 VR128:$dst, VR128:$src2)>;
def : InstAlias <"blendvpd\t{%xmm0, $src2, $dst|$dst, $src2, %xmm0}",
(BLENDVPDrm0 VR128:$dst, f128mem:$src2)>;
def : InstAlias <"blendvps\t{%xmm0, $src2, $dst|$dst, $src2, %xmm0}",
(BLENDVPSrr0 VR128:$dst, VR128:$src2)>;
def : InstAlias <"blendvps\t{%xmm0, $src2, $dst|$dst, $src2, %xmm0}",
(BLENDVPSrm0 VR128:$dst, f128mem:$src2)>;
def : InstAlias <"pblendvb\t{%xmm0, $src2, $dst|$dst, $src2, %xmm0}",
(PBLENDVBrr0 VR128:$dst, VR128:$src2)>;
def : InstAlias <"pblendvb\t{%xmm0, $src2, $dst|$dst, $src2, %xmm0}",
(PBLENDVBrm0 VR128:$dst, i128mem:$src2)>;
let Predicates = [HasSSE41] in {
def : Pat<(v16i8 (vselect (v16i8 XMM0), (v16i8 VR128:$src1),
(v16i8 VR128:$src2))),

26
test/MC/X86/x86-32-coverage.s
View File

@ -19626,3 +19626,29 @@
dppd $0x81, %xmm2, %xmm1
// CHECK: insertps $129, %xmm2, %xmm1
insertps $0x81, %xmm2, %xmm1
// PR13253 handle implicit optional third argument that must always be xmm0
// CHECK: pblendvb %xmm2, %xmm1
pblendvb %xmm2, %xmm1
// CHECK: pblendvb %xmm2, %xmm1
pblendvb %xmm0, %xmm2, %xmm1
// CHECK: pblendvb (%eax), %xmm1
pblendvb (%eax), %xmm1
// CHECK: pblendvb (%eax), %xmm1
pblendvb %xmm0, (%eax), %xmm1
// CHECK: blendvpd %xmm2, %xmm1
blendvpd %xmm2, %xmm1
// CHECK: blendvpd %xmm2, %xmm1
blendvpd %xmm0, %xmm2, %xmm1
// CHECK: blendvpd (%eax), %xmm1
blendvpd (%eax), %xmm1
// CHECK: blendvpd (%eax), %xmm1
blendvpd %xmm0, (%eax), %xmm1
// CHECK: blendvps %xmm2, %xmm1
blendvps %xmm2, %xmm1
// CHECK: blendvps %xmm2, %xmm1
blendvps %xmm0, %xmm2, %xmm1
// CHECK: blendvps (%eax), %xmm1
blendvps (%eax), %xmm1
// CHECK: blendvps (%eax), %xmm1
blendvps %xmm0, (%eax), %xmm1