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[NVPTX] Add support for cttz/ctlz/ctpop
llvm-svn: 185176
This commit is contained in:
Justin Holewinski
parent
d365a376eb
commit
6feb5e8392
@ -216,6 +216,22 @@ NVPTXTargetLowering::NVPTXTargetLowering(NVPTXTargetMachine &TM)
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// Custom handling for i8 intrinsics
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setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::i8, Custom);
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setOperationAction(ISD::CTLZ, MVT::i16, Legal);
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setOperationAction(ISD::CTLZ, MVT::i32, Legal);
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setOperationAction(ISD::CTLZ, MVT::i64, Legal);
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setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i16, Legal);
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setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Legal);
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setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Legal);
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setOperationAction(ISD::CTTZ, MVT::i16, Expand);
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setOperationAction(ISD::CTTZ, MVT::i32, Expand);
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setOperationAction(ISD::CTTZ, MVT::i64, Expand);
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setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i16, Expand);
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setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand);
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setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand);
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setOperationAction(ISD::CTPOP, MVT::i16, Legal);
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setOperationAction(ISD::CTPOP, MVT::i32, Legal);
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setOperationAction(ISD::CTPOP, MVT::i64, Legal);
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// Now deduce the information based on the above mentioned
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// actions
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computeRegisterProperties();
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@ -2406,6 +2406,64 @@ def F64toV2F32 : NVPTXInst<(outs Float32Regs:$d1, Float32Regs:$d2),
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"mov.b64\t{{$d1, $d2}}, $s;",
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[]>;
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// Count leading zeros
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def CLZr32 : NVPTXInst<(outs Int32Regs:$d), (ins Int32Regs:$a),
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"clz.b32\t$d, $a;",
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[]>;
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def CLZr64 : NVPTXInst<(outs Int32Regs:$d), (ins Int64Regs:$a),
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"clz.b64\t$d, $a;",
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[]>;
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// 32-bit has a direct PTX instruction
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def : Pat<(ctlz Int32Regs:$a),
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(CLZr32 Int32Regs:$a)>;
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def : Pat<(ctlz_zero_undef Int32Regs:$a),
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(CLZr32 Int32Regs:$a)>;
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// For 64-bit, the result in PTX is actually 32-bit so we zero-extend
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// to 64-bit to match the LLVM semantics
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def : Pat<(ctlz Int64Regs:$a),
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(CVT_u64_u32 (CLZr64 Int64Regs:$a), CvtNONE)>;
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def : Pat<(ctlz_zero_undef Int64Regs:$a),
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(CVT_u64_u32 (CLZr64 Int64Regs:$a), CvtNONE)>;
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// For 16-bit, we zero-extend to 32-bit, then trunc the result back
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// to 16-bits (ctlz of a 16-bit value is guaranteed to require less
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// than 16 bits to store). We also need to subtract 16 because the
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// high-order 16 zeros were counted.
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def : Pat<(ctlz Int16Regs:$a),
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(SUBi16ri (CVT_u16_u32 (CLZr32
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(CVT_u32_u16 Int16Regs:$a, CvtNONE)),
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CvtNONE), 16)>;
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def : Pat<(ctlz_zero_undef Int16Regs:$a),
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(SUBi16ri (CVT_u16_u32 (CLZr32
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(CVT_u32_u16 Int16Regs:$a, CvtNONE)),
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CvtNONE), 16)>;
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// Population count
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def POPCr32 : NVPTXInst<(outs Int32Regs:$d), (ins Int32Regs:$a),
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"popc.b32\t$d, $a;",
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[]>;
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def POPCr64 : NVPTXInst<(outs Int32Regs:$d), (ins Int64Regs:$a),
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"popc.b64\t$d, $a;",
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[]>;
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// 32-bit has a direct PTX instruction
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def : Pat<(ctpop Int32Regs:$a),
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(POPCr32 Int32Regs:$a)>;
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// For 64-bit, the result in PTX is actually 32-bit so we zero-extend
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// to 64-bit to match the LLVM semantics
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def : Pat<(ctpop Int64Regs:$a),
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(CVT_u64_u32 (POPCr64 Int64Regs:$a), CvtNONE)>;
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// For 16-bit, we zero-extend to 32-bit, then trunc the result back
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// to 16-bits (ctpop of a 16-bit value is guaranteed to require less
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// than 16 bits to store)
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def : Pat<(ctpop Int16Regs:$a),
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(CVT_u16_u32 (POPCr32 (CVT_u32_u16 Int16Regs:$a, CvtNONE)),
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CvtNONE)>;
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// fround f64 -> f32
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def : Pat<(f32 (fround Float64Regs:$a)),
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(CVT_f32_f64 Float64Regs:$a, CvtRN_FTZ)>, Requires<[doF32FTZ]>;
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44
test/CodeGen/NVPTX/ctlz.ll
Normal file
44
test/CodeGen/NVPTX/ctlz.ll
Normal file
@ -0,0 +1,44 @@
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; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
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declare i16 @llvm.ctlz.i16(i16, i1) readnone
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declare i32 @llvm.ctlz.i32(i32, i1) readnone
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declare i64 @llvm.ctlz.i64(i64, i1) readnone
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define i32 @myctpop(i32 %a) {
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; CHECK: clz.b32
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%val = call i32 @llvm.ctlz.i32(i32 %a, i1 false) readnone
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ret i32 %val
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}
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define i16 @myctpop16(i16 %a) {
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; CHECK: clz.b32
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%val = call i16 @llvm.ctlz.i16(i16 %a, i1 false) readnone
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ret i16 %val
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}
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define i64 @myctpop64(i64 %a) {
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; CHECK: clz.b64
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%val = call i64 @llvm.ctlz.i64(i64 %a, i1 false) readnone
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ret i64 %val
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}
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define i32 @myctpop_2(i32 %a) {
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; CHECK: clz.b32
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%val = call i32 @llvm.ctlz.i32(i32 %a, i1 true) readnone
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ret i32 %val
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}
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define i16 @myctpop16_2(i16 %a) {
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; CHECK: clz.b32
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%val = call i16 @llvm.ctlz.i16(i16 %a, i1 true) readnone
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ret i16 %val
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}
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define i64 @myctpop64_2(i64 %a) {
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; CHECK: clz.b64
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%val = call i64 @llvm.ctlz.i64(i64 %a, i1 true) readnone
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ret i64 %val
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}
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25
test/CodeGen/NVPTX/ctpop.ll
Normal file
25
test/CodeGen/NVPTX/ctpop.ll
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@ -0,0 +1,25 @@
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; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
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define i32 @myctpop(i32 %a) {
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; CHECK: popc.b32
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%val = tail call i32 @llvm.ctpop.i32(i32 %a)
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ret i32 %val
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}
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define i16 @myctpop16(i16 %a) {
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; CHECK: popc.b32
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%val = tail call i16 @llvm.ctpop.i16(i16 %a)
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ret i16 %val
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}
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define i64 @myctpop64(i64 %a) {
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; CHECK: popc.b64
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%val = tail call i64 @llvm.ctpop.i64(i64 %a)
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ret i64 %val
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}
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declare i16 @llvm.ctpop.i16(i16)
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declare i32 @llvm.ctpop.i32(i32)
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declare i64 @llvm.ctpop.i64(i64)
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45
test/CodeGen/NVPTX/cttz.ll
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45
test/CodeGen/NVPTX/cttz.ll
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@ -0,0 +1,45 @@
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; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
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declare i16 @llvm.cttz.i16(i16, i1) readnone
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declare i32 @llvm.cttz.i32(i32, i1) readnone
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declare i64 @llvm.cttz.i64(i64, i1) readnone
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define i32 @myctpop(i32 %a) {
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; CHECK: popc.b32
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%val = call i32 @llvm.cttz.i32(i32 %a, i1 false) readnone
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ret i32 %val
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}
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define i16 @myctpop16(i16 %a) {
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; CHECK: popc.b32
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%val = call i16 @llvm.cttz.i16(i16 %a, i1 false) readnone
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ret i16 %val
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}
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define i64 @myctpop64(i64 %a) {
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; CHECK: popc.b64
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%val = call i64 @llvm.cttz.i64(i64 %a, i1 false) readnone
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ret i64 %val
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}
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define i32 @myctpop_2(i32 %a) {
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; CHECK: popc.b32
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%val = call i32 @llvm.cttz.i32(i32 %a, i1 true) readnone
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ret i32 %val
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}
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define i16 @myctpop16_2(i16 %a) {
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; CHECK: popc.b32
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%val = call i16 @llvm.cttz.i16(i16 %a, i1 true) readnone
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ret i16 %val
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}
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define i64 @myctpop64_2(i64 %a) {
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; CHECK: popc.b64
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%val = call i64 @llvm.cttz.i64(i64 %a, i1 true) readnone
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ret i64 %val
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}
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