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[AArch64][SVE] Asm: Vector Unpack Low/High instructions.

This patch adds support for the following unpack instructions:
  
- PUNPKLO, PUNPKHI   Unpack elements from low/high half and
                     place into elements of twice their size.

  e.g. punpklo p0.h, p0.b

- UUNPKLO, UUNPKHI   Unpack elements from low/high half and 
  SUNPKLO, SUNPKHI   place into elements of twice their size
                     after zero- or sign-extending the values.

  e.g. uunpklo z0.h, z0.b

llvm-svn: 336982
This commit is contained in:
Sander de Smalen 2018-07-13 09:25:43 +00:00
parent 438cdac634
commit 70386770c5
14 changed files with 299 additions and 0 deletions

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@ -116,6 +116,14 @@ let Predicates = [HasSVE] in {
defm INSR_ZR : sve_int_perm_insrs<"insr">; defm INSR_ZR : sve_int_perm_insrs<"insr">;
defm INSR_ZV : sve_int_perm_insrv<"insr">; defm INSR_ZV : sve_int_perm_insrv<"insr">;
defm SUNPKLO_ZZ : sve_int_perm_unpk<0b00, "sunpklo">;
defm SUNPKHI_ZZ : sve_int_perm_unpk<0b01, "sunpkhi">;
defm UUNPKLO_ZZ : sve_int_perm_unpk<0b10, "uunpklo">;
defm UUNPKHI_ZZ : sve_int_perm_unpk<0b11, "uunpkhi">;
def PUNPKLO_PP : sve_int_perm_punpk<0b0, "punpklo">;
def PUNPKHI_PP : sve_int_perm_punpk<0b1, "punpkhi">;
def AND_PPzPP : sve_int_pred_log<0b0000, "and">; def AND_PPzPP : sve_int_pred_log<0b0000, "and">;
def BIC_PPzPP : sve_int_pred_log<0b0001, "bic">; def BIC_PPzPP : sve_int_pred_log<0b0001, "bic">;
def EOR_PPzPP : sve_int_pred_log<0b0010, "eor">; def EOR_PPzPP : sve_int_pred_log<0b0010, "eor">;

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@ -658,6 +658,28 @@ multiclass sve_int_perm_tbl<string asm> {
(!cast<Instruction>(NAME # _D) ZPR64:$Zd, ZPR64:$Zn, ZPR64:$Zm), 0>; (!cast<Instruction>(NAME # _D) ZPR64:$Zd, ZPR64:$Zn, ZPR64:$Zm), 0>;
} }
class sve_int_perm_unpk<bits<2> sz16_64, bits<2> opc, string asm,
ZPRRegOp zprty1, ZPRRegOp zprty2>
: I<(outs zprty1:$Zd), (ins zprty2:$Zn),
asm, "\t$Zd, $Zn",
"", []>, Sched<[]> {
bits<5> Zd;
bits<5> Zn;
let Inst{31-24} = 0b00000101;
let Inst{23-22} = sz16_64;
let Inst{21-18} = 0b1100;
let Inst{17-16} = opc;
let Inst{15-10} = 0b001110;
let Inst{9-5} = Zn;
let Inst{4-0} = Zd;
}
multiclass sve_int_perm_unpk<bits<2> opc, string asm> {
def _H : sve_int_perm_unpk<0b01, opc, asm, ZPR16, ZPR8>;
def _S : sve_int_perm_unpk<0b10, opc, asm, ZPR32, ZPR16>;
def _D : sve_int_perm_unpk<0b11, opc, asm, ZPR64, ZPR32>;
}
class sve_int_perm_insrs<bits<2> sz8_64, string asm, ZPRRegOp zprty, class sve_int_perm_insrs<bits<2> sz8_64, string asm, ZPRRegOp zprty,
RegisterClass srcRegType> RegisterClass srcRegType>
: I<(outs zprty:$Zdn), (ins zprty:$_Zdn, srcRegType:$Rm), : I<(outs zprty:$Zdn), (ins zprty:$_Zdn, srcRegType:$Rm),
@ -2358,6 +2380,21 @@ multiclass sve_int_perm_bin_perm_pp<bits<3> opc, string asm> {
def _D : sve_int_perm_bin_perm_pp<opc, 0b11, asm, PPR64>; def _D : sve_int_perm_bin_perm_pp<opc, 0b11, asm, PPR64>;
} }
class sve_int_perm_punpk<bit opc, string asm>
: I<(outs PPR16:$Pd), (ins PPR8:$Pn),
asm, "\t$Pd, $Pn",
"",
[]>, Sched<[]> {
bits<4> Pd;
bits<4> Pn;
let Inst{31-17} = 0b000001010011000;
let Inst{16} = opc;
let Inst{15-9} = 0b0100000;
let Inst{8-5} = Pn;
let Inst{4} = 0b0;
let Inst{3-0} = Pd;
}
class sve_int_rdffr_pred<bit s, string asm> class sve_int_rdffr_pred<bit s, string asm>
: I<(outs PPR8:$Pd), (ins PPRAny:$Pg), : I<(outs PPR8:$Pd), (ins PPRAny:$Pg),
asm, "\t$Pd, $Pg/z", asm, "\t$Pd, $Pg/z",

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@ -0,0 +1,15 @@
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
// ------------------------------------------------------------------------- //
// Invalid element widths.
punpkhi p0.b, p0.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
// CHECK-NEXT: punpkhi p0.b, p0.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
punpkhi p0.s, p0.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
// CHECK-NEXT: punpkhi p0.s, p0.h
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

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@ -0,0 +1,20 @@
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
punpkhi p0.h, p0.b
// CHECK-INST: punpkhi p0.h, p0.b
// CHECK-ENCODING: [0x00,0x40,0x31,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 00 40 31 05 <unknown>
punpkhi p15.h, p15.b
// CHECK-INST: punpkhi p15.h, p15.b
// CHECK-ENCODING: [0xef,0x41,0x31,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ef 41 31 05 <unknown>

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@ -0,0 +1,15 @@
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
// ------------------------------------------------------------------------- //
// Invalid element widths.
punpklo p0.b, p0.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
// CHECK-NEXT: punpklo p0.b, p0.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
punpklo p0.s, p0.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
// CHECK-NEXT: punpklo p0.s, p0.h
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

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@ -0,0 +1,20 @@
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
punpklo p0.h, p0.b
// CHECK-INST: punpklo p0.h, p0.b
// CHECK-ENCODING: [0x00,0x40,0x30,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 00 40 30 05 <unknown>
punpklo p15.h, p15.b
// CHECK-INST: punpklo p15.h, p15.b
// CHECK-ENCODING: [0xef,0x41,0x30,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ef 41 30 05 <unknown>

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@ -0,0 +1,20 @@
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
// ------------------------------------------------------------------------- //
// Invalid element widths.
sunpkhi z0.b, z0.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: sunpkhi z0.b, z0.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sunpkhi z0.s, z0.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: sunpkhi z0.s, z0.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sunpkhi z0.d, z0.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: sunpkhi z0.d, z0.h
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

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@ -0,0 +1,26 @@
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
sunpkhi z31.h, z31.b
// CHECK-INST: sunpkhi z31.h, z31.b
// CHECK-ENCODING: [0xff,0x3b,0x71,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 3b 71 05 <unknown>
sunpkhi z31.s, z31.h
// CHECK-INST: sunpkhi z31.s, z31.h
// CHECK-ENCODING: [0xff,0x3b,0xb1,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 3b b1 05 <unknown>
sunpkhi z31.d, z31.s
// CHECK-INST: sunpkhi z31.d, z31.s
// CHECK-ENCODING: [0xff,0x3b,0xf1,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 3b f1 05 <unknown>

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@ -0,0 +1,20 @@
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
// ------------------------------------------------------------------------- //
// Invalid element widths.
sunpklo z0.b, z0.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: sunpklo z0.b, z0.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sunpklo z0.s, z0.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: sunpklo z0.s, z0.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sunpklo z0.d, z0.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: sunpklo z0.d, z0.h
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

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@ -0,0 +1,26 @@
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
sunpklo z31.h, z31.b
// CHECK-INST: sunpklo z31.h, z31.b
// CHECK-ENCODING: [0xff,0x3b,0x70,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 3b 70 05 <unknown>
sunpklo z31.s, z31.h
// CHECK-INST: sunpklo z31.s, z31.h
// CHECK-ENCODING: [0xff,0x3b,0xb0,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 3b b0 05 <unknown>
sunpklo z31.d, z31.s
// CHECK-INST: sunpklo z31.d, z31.s
// CHECK-ENCODING: [0xff,0x3b,0xf0,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 3b f0 05 <unknown>

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@ -0,0 +1,20 @@
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
// ------------------------------------------------------------------------- //
// Invalid element widths.
uunpkhi z0.b, z0.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: uunpkhi z0.b, z0.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uunpkhi z0.s, z0.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: uunpkhi z0.s, z0.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uunpkhi z0.d, z0.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: uunpkhi z0.d, z0.h
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

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@ -0,0 +1,26 @@
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
uunpkhi z31.h, z31.b
// CHECK-INST: uunpkhi z31.h, z31.b
// CHECK-ENCODING: [0xff,0x3b,0x73,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 3b 73 05 <unknown>
uunpkhi z31.s, z31.h
// CHECK-INST: uunpkhi z31.s, z31.h
// CHECK-ENCODING: [0xff,0x3b,0xb3,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 3b b3 05 <unknown>
uunpkhi z31.d, z31.s
// CHECK-INST: uunpkhi z31.d, z31.s
// CHECK-ENCODING: [0xff,0x3b,0xf3,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 3b f3 05 <unknown>

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@ -0,0 +1,20 @@
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
// ------------------------------------------------------------------------- //
// Invalid element widths.
uunpklo z0.b, z0.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: uunpklo z0.b, z0.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uunpklo z0.s, z0.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: uunpklo z0.s, z0.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uunpklo z0.d, z0.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: uunpklo z0.d, z0.h
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

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@ -0,0 +1,26 @@
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
uunpklo z31.h, z31.b
// CHECK-INST: uunpklo z31.h, z31.b
// CHECK-ENCODING: [0xff,0x3b,0x72,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 3b 72 05 <unknown>
uunpklo z31.s, z31.h
// CHECK-INST: uunpklo z31.s, z31.h
// CHECK-ENCODING: [0xff,0x3b,0xb2,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 3b b2 05 <unknown>
uunpklo z31.d, z31.s
// CHECK-INST: uunpklo z31.d, z31.s
// CHECK-ENCODING: [0xff,0x3b,0xf2,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 3b f2 05 <unknown>