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Split out register class subclassing to a separate function and clean up
accordingly. No functional change. llvm-svn: 112008
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70a1a20101
@ -19,6 +19,7 @@
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#include "llvm/ADT/DenseMap.h"
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#include <string>
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#include <vector>
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#include <set>
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#include <cstdlib>
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namespace llvm {
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@ -55,6 +56,37 @@ namespace llvm {
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assert(0 && "VTNum greater than number of ValueTypes in RegClass!");
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abort();
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}
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// Returns true if RC is a strict subclass.
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// RC is a sub-class of this class if it is a valid replacement for any
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// instruction operand where a register of this classis required. It must
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// satisfy these conditions:
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//
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// 1. All RC registers are also in this.
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// 2. The RC spill size must not be smaller than our spill size.
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// 3. RC spill alignment must be compatible with ours.
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//
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bool hasSubClass(const CodeGenRegisterClass *RC) const {
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if (RC->Elements.size() > Elements.size() ||
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(SpillAlignment && RC->SpillAlignment % SpillAlignment) ||
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SpillSize > RC->SpillSize)
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return false;
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std::set<Record*> RegSet;
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for (unsigned i = 0, e = Elements.size(); i != e; ++i) {
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Record *Reg = Elements[i];
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RegSet.insert(Reg);
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}
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for (unsigned i = 0, e = RC->Elements.size(); i != e; ++i) {
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Record *Reg = RC->Elements[i];
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if (!RegSet.count(Reg))
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return false;
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}
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return true;
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}
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CodeGenRegisterClass(Record *R);
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};
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@ -119,16 +119,6 @@ void RegisterInfoEmitter::runHeader(raw_ostream &OS) {
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OS << "} // End llvm namespace \n";
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}
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bool isSubRegisterClass(const CodeGenRegisterClass &RC,
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std::set<Record*> &RegSet) {
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for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) {
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Record *Reg = RC.Elements[i];
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if (!RegSet.count(Reg))
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return false;
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}
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return true;
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}
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static void addSuperReg(Record *R, Record *S,
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std::map<Record*, std::set<Record*>, LessRecord> &SubRegs,
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std::map<Record*, std::set<Record*>, LessRecord> &SuperRegs,
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@ -498,12 +488,6 @@ void RegisterInfoEmitter::run(raw_ostream &OS) {
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// Give the register class a legal C name if it's anonymous.
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std::string Name = RC.TheDef->getName();
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std::set<Record*> RegSet;
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for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) {
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Record *Reg = RC.Elements[i];
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RegSet.insert(Reg);
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}
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OS << " // " << Name
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<< " Register Class sub-classes...\n"
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<< " static const TargetRegisterClass* const "
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@ -513,21 +497,9 @@ void RegisterInfoEmitter::run(raw_ostream &OS) {
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for (unsigned rc2 = 0, e2 = RegisterClasses.size(); rc2 != e2; ++rc2) {
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const CodeGenRegisterClass &RC2 = RegisterClasses[rc2];
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// RC2 is a sub-class of RC if it is a valid replacement for any
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// instruction operand where an RC register is required. It must satisfy
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// these conditions:
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//
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// 1. All RC2 registers are also in RC.
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// 2. The RC2 spill size must not be smaller that the RC spill size.
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// 3. RC2 spill alignment must be compatible with RC.
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//
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// Sub-classes are used to determine if a virtual register can be used
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// as an instruction operand, or if it must be copied first.
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if (rc == rc2 || RC2.Elements.size() > RC.Elements.size() ||
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(RC.SpillAlignment && RC2.SpillAlignment % RC.SpillAlignment) ||
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RC.SpillSize > RC2.SpillSize || !isSubRegisterClass(RC2, RegSet))
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continue;
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if (rc == rc2 || !RC.hasSubClass(&RC2)) continue;
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if (!Empty) OS << ", ";
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OS << "&" << getQualifiedName(RC2.TheDef) << "RegClass";
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