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[VectorCombine] add tests for insert into arbitrary constant; NFC
Goes with D79452.
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@ -34,6 +34,19 @@ define <8 x i16> @ins0_ins0_sub_flags(i16 %x, i16 %y) {
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ret <8 x i16> %r
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}
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define <2 x i64> @ins1_ins1_xor(i64 %x, i64 %y) {
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; CHECK-LABEL: @ins1_ins1_xor(
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; CHECK-NEXT: [[I0:%.*]] = insertelement <2 x i64> undef, i64 [[X:%.*]], i64 1
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; CHECK-NEXT: [[I1:%.*]] = insertelement <2 x i64> undef, i64 [[Y:%.*]], i32 1
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; CHECK-NEXT: [[R:%.*]] = xor <2 x i64> [[I0]], [[I1]]
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; CHECK-NEXT: ret <2 x i64> [[R]]
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;
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%i0 = insertelement <2 x i64> undef, i64 %x, i64 1
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%i1 = insertelement <2 x i64> undef, i64 %y, i32 1
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%r = xor <2 x i64> %i0, %i1
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ret <2 x i64> %r
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}
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; The inserts are free, but it's still better to scalarize.
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define <2 x double> @ins0_ins0_fadd(double %x, double %y) {
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@ -49,8 +62,6 @@ define <2 x double> @ins0_ins0_fadd(double %x, double %y) {
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ret <2 x double> %r
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}
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; Negative test - mismatched indexes. This could simplify.
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define <16 x i8> @ins1_ins0_add(i8 %x, i8 %y) {
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; CHECK-LABEL: @ins1_ins0_add(
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; CHECK-NEXT: [[I0:%.*]] = insertelement <16 x i8> undef, i8 [[X:%.*]], i32 1
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@ -64,8 +75,6 @@ define <16 x i8> @ins1_ins0_add(i8 %x, i8 %y) {
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ret <16 x i8> %r
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}
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; Negative test - not undef base vector. This could fold.
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define <4 x i32> @ins0_ins0_mul(i32 %x, i32 %y) {
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; CHECK-LABEL: @ins0_ins0_mul(
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; CHECK-NEXT: [[I0:%.*]] = insertelement <4 x i32> zeroinitializer, i32 [[X:%.*]], i32 0
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@ -79,7 +88,18 @@ define <4 x i32> @ins0_ins0_mul(i32 %x, i32 %y) {
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ret <4 x i32> %r
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}
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; Negative test - extra use. This could fold.
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define <2 x i64> @ins1_ins1_sdiv(i64 %x, i64 %y) {
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; CHECK-LABEL: @ins1_ins1_sdiv(
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; CHECK-NEXT: [[I0:%.*]] = insertelement <2 x i64> <i64 42, i64 -42>, i64 [[X:%.*]], i64 1
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; CHECK-NEXT: [[I1:%.*]] = insertelement <2 x i64> <i64 -7, i64 128>, i64 [[Y:%.*]], i32 1
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; CHECK-NEXT: [[R:%.*]] = sdiv <2 x i64> [[I0]], [[I1]]
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; CHECK-NEXT: ret <2 x i64> [[R]]
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;
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%i0 = insertelement <2 x i64> <i64 42, i64 -42>, i64 %x, i64 1
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%i1 = insertelement <2 x i64> <i64 -7, i64 128>, i64 %y, i32 1
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%r = sdiv <2 x i64> %i0, %i1
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ret <2 x i64> %r
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}
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define <4 x i32> @ins0_ins0_xor(i32 %x, i32 %y) {
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; CHECK-LABEL: @ins0_ins0_xor(
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