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AMDGPU/SI: Add support for 8-byte relocations

Browse Source 
Reviewers: arsenm, kzhuravl

Subscribers: wdng, nhaehnle, yaxunl, llvm-commits, tony-tye

Differential Revision: https://reviews.llvm.org/D25375

llvm-svn: 283593
This commit is contained in:
Tom Stellard 2016-10-07 20:36:58 +00:00
parent 99e41a98d7
commit 7128408133
2 changed files with 17 additions and 0 deletions
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2
lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
View File

@ -62,6 +62,8 @@ unsigned AMDGPUELFObjectWriter::getRelocType(MCContext &Ctx,
case FK_Data_4:
case FK_SecRel_4:
return ELF::R_AMDGPU_ABS32;
case FK_Data_8:
return ELF::R_AMDGPU_ABS64;
}
llvm_unreachable("unhandled relocation type");

15
test/MC/AMDGPU/reloc.s
View File

@ -1,10 +1,15 @@
// RUN: llvm-mc -filetype=obj -triple amdgcn-- -mcpu=kaveri -show-encoding %s | llvm-readobj -relocations | FileCheck %s
// CHECK: Relocations [
// CHECK: .rel.text {
// CHECK: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD0 0x0
// CHECK: R_AMDGPU_ABS32_HI SCRATCH_RSRC_DWORD1 0x0
// CHECK: R_AMDGPU_GOTPCREL global_var 0x0
// CHECK: R_AMDGPU_ABS32 var 0x0
// CHECK: }
// CHECK: .rel.data {
// CHECK: R_AMDGPU_ABS64 temp 0x0
// CHECK: }
// CHECK: ]
kernel:
@ -18,3 +23,13 @@ kernel:
.section nonalloc, "w", @progbits
.long var, common_var
// 8 byte relocations
.type ptr,@object
.data
.globl ptr
.p2align 3
ptr:
.quad temp
.size ptr, 8