From 71772b97479c76b771291380513b619816b686be Mon Sep 17 00:00:00 2001 From: Hal Finkel Date: Sun, 1 Apr 2012 19:23:04 +0000 Subject: [PATCH] Add ppc440 itin. entries for LdStSTD* llvm-svn: 153844 --- lib/Target/PowerPC/PPCSchedule440.td | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/lib/Target/PowerPC/PPCSchedule440.td b/lib/Target/PowerPC/PPCSchedule440.td index 9921fc8b952..419faea3022 100644 --- a/lib/Target/PowerPC/PPCSchedule440.td +++ b/lib/Target/PowerPC/PPCSchedule440.td @@ -373,6 +373,26 @@ def PPC440Itineraries : ProcessorItineraries< InstrStage<1, [LWB]>], [8, 5], [NoBypass, GPR_Bypass]>, + InstrItinData, + InstrStage<1, [PDCD1, PDCD2]>, + InstrStage<1, [DISS1, DISS2]>, + InstrStage<1, [LRACC]>, + InstrStage<1, [AGEN]>, + InstrStage<1, [CRD]>, + InstrStage<2, [LWB]>], + [8, 5], + [NoBypass, GPR_Bypass]>, + InstrItinData, + InstrStage<1, [PDCD1, PDCD2]>, + InstrStage<1, [DISS1]>, + InstrStage<1, [IRACC], 0>, + InstrStage<4, [LWARX_Hold], 0>, + InstrStage<1, [LRACC]>, + InstrStage<1, [AGEN]>, + InstrStage<1, [CRD]>, + InstrStage<1, [LWB]>], + [8, 5], + [NoBypass, GPR_Bypass]>, InstrItinData, InstrStage<1, [PDCD1, PDCD2]>, InstrStage<1, [DISS1]>,