[Aarch64] handle "o" inline asm memory constraints

This Linux kernel is making use of this inline asm constraint which is
causing an ICE.

PR49956

Link: https://github.com/ClangBuiltLinux/linux/issues/1348

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D100412

lib/Target/AArch64/AArch64ISelDAGToDAG.cpp

@@ -369,6 +369,7 @@ bool AArch64DAGToDAGISel::SelectInlineAsmMemoryOperand(
   default:
     llvm_unreachable("Unexpected asm memory constraint");
   case InlineAsm::Constraint_m:
+  case InlineAsm::Constraint_o:
   case InlineAsm::Constraint_Q:
     // We need to make sure that this one operand does not end up in XZR, thus
     // require the address to be in a PointerRegClass register.

lib/Target/AArch64/AArch64ISelLowering.h

@@ -1027,6 +1027,8 @@ private:
   unsigned getInlineAsmMemConstraint(StringRef ConstraintCode) const override {
     if (ConstraintCode == "Q")
       return InlineAsm::Constraint_Q;
+    if (ConstraintCode == "o")
+      return InlineAsm::Constraint_o;
     // FIXME: clang has code for 'Ump', 'Utf', 'Usa', and 'Ush' but these are
     //        followed by llvm_unreachable so we'll leave them unimplemented in
     //        the backend for now.

test/CodeGen/AArch64/arm64-inline-asm.ll

@@ -297,3 +297,13 @@ entry:
   call void asm sideeffect "", "=*r|m,0,~{memory}"(<9 x float>* nonnull %m.addr, <9 x float> %m)
   ret void
 }
+
+define void @test_o_output_constraint() {
+; CHECK-LABEL: test_o_output_constraint:
+; CHECK: sub sp, sp, #16
+; CHECK: add x[[REG:[0-9]+]], sp, #15
+; CHECK: mov [x[[REG]]], 7
+  %b = alloca i8, align 1
+  call void asm "mov $0, 7", "=*o"(i8* %b)
+  ret void
+}