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[X86][AVX] Regenerate combine tests with constant broadcast comments
llvm-svn: 308128
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fefa37bba8
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@ -392,7 +392,7 @@ define <4 x i32> @combine_vec_shl_gt_lshr0(<4 x i32> %x) {
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;
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; AVX-LABEL: combine_vec_shl_gt_lshr0:
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; AVX: # BB#0:
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; AVX-NEXT: vpbroadcastd {{.*}}(%rip), %xmm1
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; AVX-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294967264,4294967264,4294967264,4294967264]
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; AVX-NEXT: vpslld $2, %xmm0, %xmm0
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; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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@ -437,7 +437,7 @@ define <4 x i32> @combine_vec_shl_le_lshr0(<4 x i32> %x) {
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;
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; AVX-LABEL: combine_vec_shl_le_lshr0:
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; AVX: # BB#0:
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; AVX-NEXT: vpbroadcastd {{.*}}(%rip), %xmm1
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; AVX-NEXT: vpbroadcastd {{.*#+}} xmm1 = [1073741816,1073741816,1073741816,1073741816]
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; AVX-NEXT: vpsrld $2, %xmm0, %xmm0
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; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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@ -481,7 +481,7 @@ define <4 x i32> @combine_vec_shl_ashr0(<4 x i32> %x) {
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;
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; AVX-LABEL: combine_vec_shl_ashr0:
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; AVX: # BB#0:
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; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm1
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; AVX-NEXT: vbroadcastss {{.*#+}} xmm1 = [4294967264,4294967264,4294967264,4294967264]
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; AVX-NEXT: vandps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%1 = ashr <4 x i32> %x, <i32 5, i32 5, i32 5, i32 5>
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@ -515,7 +515,7 @@ define <4 x i32> @combine_vec_shl_add0(<4 x i32> %x) {
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; AVX-LABEL: combine_vec_shl_add0:
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; AVX: # BB#0:
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; AVX-NEXT: vpslld $2, %xmm0, %xmm0
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; AVX-NEXT: vpbroadcastd {{.*}}(%rip), %xmm1
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; AVX-NEXT: vpbroadcastd {{.*#+}} xmm1 = [20,20,20,20]
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; AVX-NEXT: vpaddd %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%1 = add <4 x i32> %x, <i32 5, i32 5, i32 5, i32 5>
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@ -550,7 +550,7 @@ define <4 x i32> @combine_vec_shl_or0(<4 x i32> %x) {
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;
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; AVX-LABEL: combine_vec_shl_or0:
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; AVX: # BB#0:
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; AVX-NEXT: vpbroadcastd {{.*}}(%rip), %xmm1
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; AVX-NEXT: vpbroadcastd {{.*#+}} xmm1 = [5,5,5,5]
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; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vpslld $2, %xmm0, %xmm0
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; AVX-NEXT: retq
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@ -585,7 +585,7 @@ define <4 x i32> @combine_vec_shl_mul0(<4 x i32> %x) {
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;
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; AVX-LABEL: combine_vec_shl_mul0:
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; AVX: # BB#0:
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; AVX-NEXT: vpbroadcastd {{.*}}(%rip), %xmm1
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; AVX-NEXT: vpbroadcastd {{.*#+}} xmm1 = [20,20,20,20]
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; AVX-NEXT: vpmulld %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%1 = mul <4 x i32> %x, <i32 5, i32 5, i32 5, i32 5>
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@ -91,7 +91,7 @@ define <4 x i32> @combine_vec_lshr_known_zero1(<4 x i32> %x) {
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;
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; AVX-LABEL: combine_vec_lshr_known_zero1:
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; AVX: # BB#0:
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; AVX-NEXT: vpbroadcastd {{.*}}(%rip), %xmm1
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; AVX-NEXT: vpbroadcastd {{.*#+}} xmm1 = [15,15,15,15]
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; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vpsrlvd {{.*}}(%rip), %xmm0, %xmm0
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; AVX-NEXT: retq
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@ -326,7 +326,7 @@ define <4 x i32> @combine_vec_lshr_shl_mask0(<4 x i32> %x) {
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;
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; AVX-LABEL: combine_vec_lshr_shl_mask0:
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; AVX: # BB#0:
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; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm1
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; AVX-NEXT: vbroadcastss {{.*#+}} xmm1 = [1073741823,1073741823,1073741823,1073741823]
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; AVX-NEXT: vandps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%1 = shl <4 x i32> %x, <i32 2, i32 2, i32 2, i32 2>
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@ -376,10 +376,10 @@ define <4 x i32> @combine_vec_lshr_lzcnt_bit0(<4 x i32> %x) {
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;
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; AVX-LABEL: combine_vec_lshr_lzcnt_bit0:
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; AVX: # BB#0:
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; AVX-NEXT: vpbroadcastd {{.*}}(%rip), %xmm1
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; AVX-NEXT: vpbroadcastd {{.*#+}} xmm1 = [16,16,16,16]
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; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vpsrld $4, %xmm0, %xmm0
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; AVX-NEXT: vpbroadcastd {{.*}}(%rip), %xmm1
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; AVX-NEXT: vpbroadcastd {{.*#+}} xmm1 = [1,1,1,1]
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; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%1 = and <4 x i32> %x, <i32 16, i32 16, i32 16, i32 16>
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@ -166,7 +166,7 @@ define <4 x i32> @combine_vec_udiv_by_shl_pow2a(<4 x i32> %x, <4 x i32> %y) {
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;
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; AVX2-LABEL: combine_vec_udiv_by_shl_pow2a:
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; AVX2: # BB#0:
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; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm2
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; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [2,2,2,2]
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; AVX2-NEXT: vpaddd %xmm2, %xmm1, %xmm1
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; AVX2-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: retq
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@ -43,7 +43,7 @@ define <4 x i32> @combine_vec_urem_by_pow2a(<4 x i32> %x) {
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;
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; AVX2-LABEL: combine_vec_urem_by_pow2a:
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; AVX2: # BB#0:
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; AVX2-NEXT: vbroadcastss {{.*}}(%rip), %xmm1
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; AVX2-NEXT: vbroadcastss {{.*#+}} xmm1 = [3,3,3,3]
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; AVX2-NEXT: vandps %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: retq
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%1 = urem <4 x i32> %x, <i32 4, i32 4, i32 4, i32 4>
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@ -87,7 +87,7 @@ define <4 x i32> @combine_vec_urem_by_pow2c(<4 x i32> %x, <4 x i32> %y) {
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;
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; AVX2-LABEL: combine_vec_urem_by_pow2c:
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; AVX2: # BB#0:
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; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm2
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; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [1,1,1,1]
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; AVX2-NEXT: vpsllvd %xmm1, %xmm2, %xmm1
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; AVX2-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
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; AVX2-NEXT: vpaddd %xmm2, %xmm1, %xmm1
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@ -146,7 +146,7 @@ define <4 x i32> @combine_vec_urem_by_pow2d(<4 x i32> %x, <4 x i32> %y) {
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;
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; AVX2-LABEL: combine_vec_urem_by_pow2d:
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; AVX2: # BB#0:
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; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm2
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; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
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; AVX2-NEXT: vpsrlvd %xmm1, %xmm2, %xmm1
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; AVX2-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
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; AVX2-NEXT: vpaddd %xmm2, %xmm1, %xmm1
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@ -183,7 +183,7 @@ define <4 x i32> @combine_vec_urem_by_shl_pow2a(<4 x i32> %x, <4 x i32> %y) {
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;
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; AVX2-LABEL: combine_vec_urem_by_shl_pow2a:
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; AVX2: # BB#0:
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; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm2
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; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [4,4,4,4]
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; AVX2-NEXT: vpsllvd %xmm1, %xmm2, %xmm1
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; AVX2-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
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; AVX2-NEXT: vpaddd %xmm2, %xmm1, %xmm1
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