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[X86][SSE] Updated sse/avx cvtsi2sd tests to use non-constant value
llvm-svn: 270425
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@ -1,4 +1,4 @@
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; NOTE: Assertions have been autogenerated by update_llc_test_checks.py
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=avx,aes,pclmul | FileCheck %s --check-prefix=AVX
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; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=avx512vl,aes,pclmul | FileCheck %s --check-prefix=AVX512VL
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@ -402,19 +402,17 @@ define <4 x float> @test_x86_sse2_cvtsd2ss(<4 x float> %a0, <2 x double> %a1) {
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declare <4 x float> @llvm.x86.sse2.cvtsd2ss(<4 x float>, <2 x double>) nounwind readnone
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define <2 x double> @test_x86_sse2_cvtsi2sd(<2 x double> %a0) {
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define <2 x double> @test_x86_sse2_cvtsi2sd(<2 x double> %a0, i32 %a1) {
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; AVX-LABEL: test_x86_sse2_cvtsi2sd:
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; AVX: ## BB#0:
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; AVX-NEXT: movl $7, %eax
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; AVX-NEXT: vcvtsi2sdl %eax, %xmm0, %xmm0
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; AVX-NEXT: vcvtsi2sdl {{[0-9]+}}(%esp), %xmm0, %xmm0
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; AVX-NEXT: retl
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;
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; AVX512VL-LABEL: test_x86_sse2_cvtsi2sd:
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; AVX512VL: ## BB#0:
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; AVX512VL-NEXT: movl $7, %eax
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; AVX512VL-NEXT: vcvtsi2sdl %eax, %xmm0, %xmm0
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; AVX512VL-NEXT: vcvtsi2sdl {{[0-9]+}}(%esp), %xmm0, %xmm0
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; AVX512VL-NEXT: retl
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%res = call <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double> %a0, i32 7) ; <<2 x double>> [#uses=1]
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%res = call <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double> %a0, i32 %a1) ; <<2 x double>> [#uses=1]
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ret <2 x double> %res
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}
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declare <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double>, i32) nounwind readnone
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@ -1,4 +1,4 @@
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; NOTE: Assertions have been autogenerated by update_llc_test_checks.py
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse2 | FileCheck %s --check-prefix=SSE
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; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=KNL
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@ -306,19 +306,17 @@ define <4 x float> @test_x86_sse2_cvtsd2ss(<4 x float> %a0, <2 x double> %a1) {
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declare <4 x float> @llvm.x86.sse2.cvtsd2ss(<4 x float>, <2 x double>) nounwind readnone
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define <2 x double> @test_x86_sse2_cvtsi2sd(<2 x double> %a0) {
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define <2 x double> @test_x86_sse2_cvtsi2sd(<2 x double> %a0, i32 %a1) {
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; SSE-LABEL: test_x86_sse2_cvtsi2sd:
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; SSE: ## BB#0:
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; SSE-NEXT: movl $7, %eax
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; SSE-NEXT: cvtsi2sdl %eax, %xmm0
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; SSE-NEXT: cvtsi2sdl {{[0-9]+}}(%esp), %xmm0
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; SSE-NEXT: retl
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;
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; KNL-LABEL: test_x86_sse2_cvtsi2sd:
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; KNL: ## BB#0:
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; KNL-NEXT: movl $7, %eax
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; KNL-NEXT: vcvtsi2sdl %eax, %xmm0, %xmm0
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; KNL-NEXT: vcvtsi2sdl {{[0-9]+}}(%esp), %xmm0, %xmm0
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; KNL-NEXT: retl
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%res = call <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double> %a0, i32 7) ; <<2 x double>> [#uses=1]
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%res = call <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double> %a0, i32 %a1) ; <<2 x double>> [#uses=1]
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ret <2 x double> %res
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}
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declare <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double>, i32) nounwind readnone
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