mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-19 19:12:56 +02:00
[FastISel] Pass the fneg input operand to hasTrivialKill in FastISel::selectFNeg.
We're trying to calculate the kill flag for OpReg which is the input so we need to pass the input here. llvm-svn: 360097
This commit is contained in:
parent
15c3b535a5
commit
725f9bb4d9
@ -1719,7 +1719,7 @@ bool FastISel::selectFNeg(const User *I) {
|
||||
unsigned OpReg = getRegForValue(X);
|
||||
if (!OpReg)
|
||||
return false;
|
||||
bool OpRegIsKill = hasTrivialKill(I);
|
||||
bool OpRegIsKill = hasTrivialKill(X);
|
||||
|
||||
// If the target has ISD::FNEG, use it.
|
||||
EVT VT = TLI.getValueType(DL, I->getType());
|
||||
|
@ -9,7 +9,7 @@ define void @goo(double* %x, double* %y) nounwind {
|
||||
; CHECK-NEXT: %[[REG1:.*]]:gr64 = COPY killed %[[REG0]]
|
||||
; CHECK-NEXT: %[[REG3:.*]]:gr64 = COPY killed %[[REG2]]
|
||||
; CHECK-NEXT: %[[REG10:.*]]:fr64 = MOVSDrm %[[REG1]], 1, $noreg, 0, $noreg :: (load 8 from %ir.x)
|
||||
; CHECK-NEXT: %[[REG6:.*]]:gr64 = MOVSDto64rr %[[REG10]]
|
||||
; CHECK-NEXT: %[[REG6:.*]]:gr64 = MOVSDto64rr killed %[[REG10]]
|
||||
; CHECK-NEXT: %[[REG7:.*]]:gr64 = MOV64ri -9223372036854775808
|
||||
; CHECK-NEXT: %[[REG8:.*]]:gr64 = XOR64rr killed %[[REG6]], %[[REG7]], implicit-def $eflags
|
||||
; CHECK-NEXT: %[[REG9:.*]]:fr64 = MOV64toSDrr killed %[[REG8]]
|
||||
|
Loading…
Reference in New Issue
Block a user