From 72e51c94b1cbef2b4c186605a84f6ddc8ac4c45e Mon Sep 17 00:00:00 2001
From: Nadav Rotem <nadav.rotem@intel.com>
Date: Wed, 15 Jun 2011 12:26:53 +0000
Subject: [PATCH] This test was failing on X86 machines which do not have SSE4.
 Fixed the test by specifying that the target CPU is corei7.

llvm-svn: 133053
---
 test/CodeGen/X86/4char-promote.ll | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
 create mode 100644 test/CodeGen/X86/4char-promote.ll

diff --git a/test/CodeGen/X86/4char-promote.ll b/test/CodeGen/X86/4char-promote.ll
new file mode 100644
index 00000000000..386057f0a3b
--- /dev/null
+++ b/test/CodeGen/X86/4char-promote.ll
@@ -0,0 +1,17 @@
+; A test for checking PR 9623
+;RUN: llc -march=x86-64 -mcpu=corei7 -promote-elements < %s | FileCheck %s
+
+target triple = "x86_64-apple-darwin"
+
+; CHECK:  pmulld 
+; CHECK:  paddd  
+; CHECK:  movdqa 
+
+define <4 x i8> @foo(<4 x i8> %x, <4 x i8> %y) {
+entry:
+ %binop = mul <4 x i8> %x, %y
+ %binop6 = add <4 x i8> %binop, %x
+ ret <4 x i8> %binop6
+}
+
+