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per a suggestion by Frits van Bommel, mark all MBlaze Pseudo

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instructions as isCodeGenOnly in the parent class instead of
sprinkling it throughout the .td files.

llvm-svn: 118125
This commit is contained in:
Chris Lattner 2010-11-02 23:57:05 +00:00
parent 5bf66af7ed
commit 73111ecc25
3 changed files with 8 additions and 5 deletions
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2
lib/Target/MBlaze/MBlazeInstrFPU.td
View File

@ -124,7 +124,7 @@ let isAsCheapAsAMove = 1 in {
}
let usesCustomInserter = 1, isCodeGenOnly = 1 in {
let usesCustomInserter = 1 in {
def Select_FCC : MBlazePseudo<(outs GPR:$dst),
(ins GPR:$T, GPR:$F, GPR:$CMP, i32imm:$CC),
"; SELECT_FCC PSEUDO!",

7
lib/Target/MBlaze/MBlazeInstrFormats.td
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@ -49,8 +49,7 @@ def FC : Format<18>; // NOP
// Generic MBlaze Format
class MBlazeInst<bits<6> op, Format form, dag outs, dag ins, string asmstr,
list<dag> pattern, InstrItinClass itin> : Instruction
{
list<dag> pattern, InstrItinClass itin> : Instruction {
let Namespace = "MBlaze";
field bits<32> Inst;
@ -61,6 +60,10 @@ class MBlazeInst<bits<6> op, Format form, dag outs, dag ins, string asmstr,
// Top 6 bits are the 'opcode' field
let Inst{0-5} = opcode;
// If the instruction is marked as a pseudo, set isCodeGenOnly so that the
// assembler and disassmbler ignore it.
let isCodeGenOnly = !eq(!cast<string>(form), "FPseudo");
dag OutOperandList = outs;
dag InOperandList = ins;

4
lib/Target/MBlaze/MBlazeInstrInfo.td
View File

@ -125,7 +125,7 @@ def xaddr : ComplexPattern<i32, 2, "SelectAddrRegReg", [], []>;
//===----------------------------------------------------------------------===//
// As stack alignment is always done with addiu, we need a 16-bit immediate
let Defs = [R1], Uses = [R1], isCodeGenOnly = 1 in {
let Defs = [R1], Uses = [R1] in {
def ADJCALLSTACKDOWN : MBlazePseudo<(outs), (ins simm16:$amt),
"#ADJCALLSTACKDOWN $amt",
[(callseq_start timm:$amt)]>;
@ -526,7 +526,7 @@ let neverHasSideEffects = 1 in {
def NOP : MBlazeInst< 0x20, FC, (outs), (ins), "nop ", [], IIAlu>;
}
let usesCustomInserter = 1, isCodeGenOnly = 1 in {
let usesCustomInserter = 1 in {
def Select_CC : MBlazePseudo<(outs GPR:$dst),
(ins GPR:$T, GPR:$F, GPR:$CMP, i32imm:$CC),
"; SELECT_CC PSEUDO!",