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[AArch64] custom lowering for i128 popcount
halves the number of CNT instructions generated
This commit is contained in:
Shawn Landden
parent
ce45ca3d8a
commit
733c4b788c
@ -370,6 +370,7 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
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setOperationAction(ISD::CTPOP, MVT::i32, Custom);
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setOperationAction(ISD::CTPOP, MVT::i64, Custom);
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setOperationAction(ISD::CTPOP, MVT::i128, Custom);
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setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
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setOperationAction(ISD::SDIVREM, MVT::i64, Expand);
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@ -5423,6 +5424,15 @@ SDValue AArch64TargetLowering::LowerCTPOP(SDValue Op, SelectionDAG &DAG) const {
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if (VT == MVT::i64)
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UaddLV = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, UaddLV);
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return UaddLV;
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} else if (VT == MVT::i128) {
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Val = DAG.getNode(ISD::BITCAST, DL, MVT::v16i8, Val);
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SDValue CtPop = DAG.getNode(ISD::CTPOP, DL, MVT::v16i8, Val);
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SDValue UaddLV = DAG.getNode(
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ISD::INTRINSIC_WO_CHAIN, DL, MVT::i32,
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DAG.getConstant(Intrinsic::aarch64_neon_uaddlv, DL, MVT::i32), CtPop);
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return DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i128, UaddLV);
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}
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assert((VT == MVT::v1i64 || VT == MVT::v2i64 || VT == MVT::v2i32 ||
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@ -14105,6 +14115,9 @@ void AArch64TargetLowering::ReplaceNodeResults(
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Results.push_back(LowerVECREDUCE(SDValue(N, 0), DAG));
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return;
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case ISD::CTPOP:
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Results.push_back(LowerCTPOP(SDValue(N, 0), DAG));
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return;
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case AArch64ISD::SADDV:
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ReplaceReductionResults(N, Results, DAG, ISD::ADD, AArch64ISD::SADDV);
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return;
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@ -1,18 +1,20 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=aarch64-unknown-unknown | FileCheck %s
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; RUN: llc < %s -O0 -mtriple=aarch64-unknown-unknown | FileCheck %s
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; Function Attrs: nobuiltin nounwind readonly
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define i8 @popcount128(i128* nocapture nonnull readonly %0) {
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; CHECK-LABEL: popcount128:
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; CHECK: // %bb.0: // %Entry
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; CHECK-NEXT: ldp d1, d0, [x0]
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; CHECK-NEXT: cnt v0.8b, v0.8b
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; CHECK-NEXT: cnt v1.8b, v1.8b
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; CHECK-NEXT: uaddlv h0, v0.8b
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; CHECK-NEXT: uaddlv h1, v1.8b
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; CHECK-NEXT: fmov w8, s0
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; CHECK-NEXT: fmov w9, s1
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; CHECK-NEXT: add w0, w9, w8
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; CHECK-NEXT: ldr x8, [x0, #8]
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; CHECK-NEXT: ldr d0, [x0]
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; CHECK-NEXT: // implicit-def: $q1
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; CHECK-NEXT: mov v1.16b, v0.16b
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; CHECK-NEXT: mov v1.d[1], x8
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; CHECK-NEXT: cnt v0.16b, v1.16b
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; CHECK-NEXT: uaddlv h0, v0.16b
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; CHECK-NEXT: // implicit-def: $q1
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; CHECK-NEXT: mov v1.16b, v0.16b
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; CHECK-NEXT: fmov w0, s1
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; CHECK-NEXT: ret
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Entry:
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%1 = load i128, i128* %0, align 16
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@ -28,23 +30,27 @@ declare i128 @llvm.ctpop.i128(i128)
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define i16 @popcount256(i256* nocapture nonnull readonly %0) {
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; CHECK-LABEL: popcount256:
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; CHECK: // %bb.0: // %Entry
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; CHECK-NEXT: ldp d1, d0, [x0, #16]
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; CHECK-NEXT: ldp d3, d2, [x0]
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; CHECK-NEXT: cnt v0.8b, v0.8b
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; CHECK-NEXT: cnt v1.8b, v1.8b
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; CHECK-NEXT: uaddlv h0, v0.8b
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; CHECK-NEXT: cnt v2.8b, v2.8b
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; CHECK-NEXT: uaddlv h1, v1.8b
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; CHECK-NEXT: fmov w8, s0
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; CHECK-NEXT: cnt v0.8b, v3.8b
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; CHECK-NEXT: uaddlv h2, v2.8b
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; CHECK-NEXT: ldr x8, [x0, #8]
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; CHECK-NEXT: ldr x9, [x0, #24]
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; CHECK-NEXT: ldr d0, [x0, #16]
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; CHECK-NEXT: // implicit-def: $q1
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; CHECK-NEXT: mov v1.16b, v0.16b
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; CHECK-NEXT: mov v1.d[1], x9
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; CHECK-NEXT: cnt v0.16b, v1.16b
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; CHECK-NEXT: uaddlv h0, v0.16b
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; CHECK-NEXT: // implicit-def: $q1
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; CHECK-NEXT: mov v1.16b, v0.16b
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; CHECK-NEXT: fmov w9, s1
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; CHECK-NEXT: uaddlv h0, v0.8b
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; CHECK-NEXT: fmov w10, s2
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; CHECK-NEXT: add w8, w9, w8
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; CHECK-NEXT: fmov w9, s0
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; CHECK-NEXT: add w9, w9, w10
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; CHECK-NEXT: add w0, w9, w8
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; CHECK-NEXT: ldr d0, [x0]
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; CHECK-NEXT: // implicit-def: $q1
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; CHECK-NEXT: mov v1.16b, v0.16b
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; CHECK-NEXT: mov v1.d[1], x8
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; CHECK-NEXT: cnt v0.16b, v1.16b
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; CHECK-NEXT: uaddlv h0, v0.16b
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; CHECK-NEXT: // implicit-def: $q1
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; CHECK-NEXT: mov v1.16b, v0.16b
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; CHECK-NEXT: fmov w8, s1
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; CHECK-NEXT: add w0, w8, w9
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; CHECK-NEXT: ret
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Entry:
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%1 = load i256, i256* %0, align 16
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@ -59,17 +65,17 @@ declare i256 @llvm.ctpop.i256(i256)
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define <1 x i128> @popcount1x128(<1 x i128> %0) {
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; CHECK-LABEL: popcount1x128:
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; CHECK: // %bb.0: // %Entry
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; CHECK-NEXT: fmov d0, x1
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; CHECK-NEXT: fmov d1, x0
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; CHECK-NEXT: cnt v0.8b, v0.8b
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; CHECK-NEXT: cnt v1.8b, v1.8b
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; CHECK-NEXT: uaddlv h0, v0.8b
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; CHECK-NEXT: uaddlv h1, v1.8b
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; CHECK-NEXT: movi v2.2d, #0000000000000000
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; CHECK-NEXT: fmov w8, s0
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; CHECK-NEXT: fmov w9, s1
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; CHECK-NEXT: add x0, x9, x8
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; CHECK-NEXT: mov x1, v2.d[1]
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; CHECK-NEXT: // implicit-def: $q0
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; CHECK-NEXT: fmov d0, x0
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; CHECK-NEXT: mov v0.d[1], x1
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; CHECK-NEXT: cnt v0.16b, v0.16b
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; CHECK-NEXT: uaddlv h0, v0.16b
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; CHECK-NEXT: // implicit-def: $q1
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; CHECK-NEXT: mov v1.16b, v0.16b
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; CHECK-NEXT: fmov w0, s1
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; CHECK-NEXT: // kill: def $x0 killed $w0
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; CHECK-NEXT: movi v0.2d, #0000000000000000
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; CHECK-NEXT: mov x1, v0.d[1]
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; CHECK-NEXT: ret
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Entry:
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%1 = tail call <1 x i128> @llvm.ctpop.v1.i128(<1 x i128> %0)
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