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Optional hash symbol feature support for ARM64
http://reviews.llvm.org/D3328 llvm-svn: 206276
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@ -2023,8 +2023,10 @@ ARM64AsmParser::tryParsePrefetch(OperandVector &Operands) {
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SMLoc S = getLoc();
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const AsmToken &Tok = Parser.getTok();
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// Either an identifier for named values or a 5-bit immediate.
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if (Tok.is(AsmToken::Hash)) {
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Parser.Lex(); // Eat hash token.
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bool Hash = Tok.is(AsmToken::Hash);
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if (Hash || Tok.is(AsmToken::Integer)) {
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if (Hash)
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Parser.Lex(); // Eat hash token.
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const MCExpr *ImmVal;
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if (getParser().parseExpression(ImmVal))
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return MatchOperand_ParseFail;
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@ -2135,9 +2137,11 @@ ARM64AsmParser::OperandMatchResultTy
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ARM64AsmParser::tryParseFPImm(OperandVector &Operands) {
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SMLoc S = getLoc();
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if (Parser.getTok().isNot(AsmToken::Hash))
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return MatchOperand_NoMatch;
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Parser.Lex(); // Eat the '#'.
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bool Hash = false;
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if (Parser.getTok().is(AsmToken::Hash)) {
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Parser.Lex(); // Eat '#'
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Hash = true;
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}
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// Handle negation, as that still comes through as a separate token.
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bool isNegative = false;
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@ -2183,6 +2187,9 @@ ARM64AsmParser::tryParseFPImm(OperandVector &Operands) {
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return MatchOperand_Success;
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}
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if (!Hash)
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return MatchOperand_NoMatch;
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TokError("invalid floating point immediate");
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return MatchOperand_ParseFail;
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}
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@ -2257,9 +2264,12 @@ bool ARM64AsmParser::parseOptionalShift(OperandVector &Operands) {
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Parser.Lex();
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// We expect a number here.
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if (getLexer().isNot(AsmToken::Hash))
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bool Hash = getLexer().is(AsmToken::Hash);
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if (!Hash && getLexer().isNot(AsmToken::Integer))
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return TokError("immediate value expected for shifter operand");
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Parser.Lex(); // Eat the '#'.
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if (Hash)
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Parser.Lex(); // Eat the '#'.
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SMLoc ExprLoc = getLoc();
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const MCExpr *ImmVal;
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@ -2318,14 +2328,16 @@ bool ARM64AsmParser::parseOptionalExtend(OperandVector &Operands) {
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return false;
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}
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if (getLexer().isNot(AsmToken::Hash)) {
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bool Hash = getLexer().is(AsmToken::Hash);
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if (!Hash && getLexer().isNot(AsmToken::Integer)) {
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SMLoc E = SMLoc::getFromPointer(getLoc().getPointer() - 1);
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Operands.push_back(
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ARM64Operand::CreateExtend(ExtOp, 0, S, E, getContext()));
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return false;
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}
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Parser.Lex(); // Eat the '#'.
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if (Hash)
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Parser.Lex(); // Eat the '#'.
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const MCExpr *ImmVal;
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if (getParser().parseExpression(ImmVal))
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@ -2593,9 +2605,11 @@ ARM64AsmParser::tryParseBarrierOperand(OperandVector &Operands) {
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const AsmToken &Tok = Parser.getTok();
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// Can be either a #imm style literal or an option name
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if (Tok.is(AsmToken::Hash)) {
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bool Hash = Tok.is(AsmToken::Hash);
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if (Hash || Tok.is(AsmToken::Integer)) {
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// Immediate operand.
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Parser.Lex(); // Eat the '#'
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if (Hash)
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Parser.Lex(); // Eat the '#'
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const MCExpr *ImmVal;
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SMLoc ExprLoc = getLoc();
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if (getParser().parseExpression(ImmVal))
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@ -2830,13 +2844,15 @@ bool ARM64AsmParser::parseMemory(OperandVector &Operands) {
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Parser.Lex(); // Eat the extend op.
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bool Hash = getLexer().is(AsmToken::Hash);
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if (getLexer().is(AsmToken::RBrac)) {
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// No immediate operand.
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if (ExtOp == ARM64_AM::UXTX)
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return Error(ExtLoc, "LSL extend requires immediate operand");
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} else if (getLexer().is(AsmToken::Hash)) {
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} else if (Hash || getLexer().is(AsmToken::Integer)) {
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// Immediate operand.
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Parser.Lex(); // Eat the '#'
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if (Hash)
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Parser.Lex(); // Eat the '#'
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const MCExpr *ImmVal;
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SMLoc ExprLoc = getLoc();
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if (getParser().parseExpression(ImmVal))
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@ -2864,8 +2880,10 @@ bool ARM64AsmParser::parseMemory(OperandVector &Operands) {
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return false;
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// Immediate expressions.
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} else if (Parser.getTok().is(AsmToken::Hash)) {
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Parser.Lex(); // Eat hash token.
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} else if (Parser.getTok().is(AsmToken::Hash) ||
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Parser.getTok().is(AsmToken::Integer)) {
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if (Parser.getTok().is(AsmToken::Hash))
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Parser.Lex(); // Eat hash token.
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if (parseSymbolicImmVal(OffsetExpr))
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return true;
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@ -3159,10 +3177,13 @@ bool ARM64AsmParser::parseOperand(OperandVector &Operands, bool isCondCode,
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Operands.push_back(ARM64Operand::CreateImm(IdVal, S, E, getContext()));
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return false;
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}
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case AsmToken::Integer:
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case AsmToken::Real:
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case AsmToken::Hash: {
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// #42 -> immediate.
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S = getLoc();
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Parser.Lex();
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if (getLexer().is(AsmToken::Hash))
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Parser.Lex();
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// The only Real that should come through here is a literal #0.0 for
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// the fcmp[e] r, #0.0 instructions. They expect raw token operands,
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31
test/MC/ARM64/optional-hash.s
Normal file
31
test/MC/ARM64/optional-hash.s
Normal file
@ -0,0 +1,31 @@
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; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding < %s | FileCheck %s
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.text
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; parseOperand check
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; CHECK: add sp, sp, #32 ; encoding: [0xff,0x83,0x00,0x91]
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add sp, sp, 32
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; Optional shift
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; CHECK: adds x3, x4, #4194304 ; encoding: [0x83,0x00,0x50,0xb1]
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adds x3, x4, 1024, lsl 12
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; Optional extend
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; CHECK: add sp, x2, x3 ; encoding: [0x5f,0x60,0x23,0x8b]
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add sp, x2, x3, uxtx 0
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; FP immediates
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; CHECK: fmov s1, #1.250000e-01 ; encoding: [0x01,0x10,0x28,0x1e]
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fmov s1, 0.125
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; Barrier operand
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; CHECK: dmb osh ; encoding: [0xbf,0x33,0x03,0xd5]
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dmb 3
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; Prefetch and memory
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; Single register inside []
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; CHECK: ldnp w3, w2, [x15, #16] ; encoding: [0xe3,0x09,0x42,0x28]
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ldnp w3, w2, [x15, 16]
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; Memory, two registers inside []
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; CHECK: prfm pstl3strm, [x4, x5, lsl #3] ; encoding: [0x95,0x78,0xa5,0xf8]
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prfm pstl3strm, [x4, x5, lsl 3]
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