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make compose and isMoveInstr static functions.
llvm-svn: 134093
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6dd5433c5c
commit
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@ -90,15 +90,15 @@ INITIALIZE_PASS_END(RegisterCoalescer, "simple-register-coalescing",
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char RegisterCoalescer::ID = 0;
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unsigned CoalescerPair::compose(unsigned a, unsigned b) const {
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static unsigned compose(const TargetRegisterInfo &tri, unsigned a, unsigned b) {
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if (!a) return b;
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if (!b) return a;
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return tri_.composeSubRegIndices(a, b);
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return tri.composeSubRegIndices(a, b);
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}
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bool CoalescerPair::isMoveInstr(const MachineInstr *MI,
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unsigned &Src, unsigned &Dst,
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unsigned &SrcSub, unsigned &DstSub) const {
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static bool isMoveInstr(const TargetRegisterInfo &tri, const MachineInstr *MI,
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unsigned &Src, unsigned &Dst,
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unsigned &SrcSub, unsigned &DstSub) {
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if (MI->isCopy()) {
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Dst = MI->getOperand(0).getReg();
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DstSub = MI->getOperand(0).getSubReg();
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@ -106,7 +106,8 @@ bool CoalescerPair::isMoveInstr(const MachineInstr *MI,
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SrcSub = MI->getOperand(1).getSubReg();
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} else if (MI->isSubregToReg()) {
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Dst = MI->getOperand(0).getReg();
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DstSub = compose(MI->getOperand(0).getSubReg(), MI->getOperand(3).getImm());
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DstSub = compose(tri, MI->getOperand(0).getSubReg(),
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MI->getOperand(3).getImm());
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Src = MI->getOperand(2).getReg();
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SrcSub = MI->getOperand(2).getSubReg();
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} else
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@ -120,7 +121,7 @@ bool CoalescerPair::setRegisters(const MachineInstr *MI) {
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flipped_ = crossClass_ = false;
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unsigned Src, Dst, SrcSub, DstSub;
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if (!isMoveInstr(MI, Src, Dst, SrcSub, DstSub))
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if (!isMoveInstr(tri_, MI, Src, Dst, SrcSub, DstSub))
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return false;
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partial_ = SrcSub || DstSub;
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@ -210,7 +211,7 @@ bool CoalescerPair::isCoalescable(const MachineInstr *MI) const {
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if (!MI)
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return false;
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unsigned Src, Dst, SrcSub, DstSub;
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if (!isMoveInstr(MI, Src, Dst, SrcSub, DstSub))
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if (!isMoveInstr(tri_, MI, Src, Dst, SrcSub, DstSub))
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return false;
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// Find the virtual register that is srcReg_.
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@ -239,7 +240,7 @@ bool CoalescerPair::isCoalescable(const MachineInstr *MI) const {
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if (dstReg_ != Dst)
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return false;
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// Registers match, do the subregisters line up?
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return compose(subIdx_, SrcSub) == DstSub;
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return compose(tri_, subIdx_, SrcSub) == DstSub;
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}
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}
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@ -281,13 +281,6 @@ namespace llvm {
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/// is a physreg.
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const TargetRegisterClass *newRC_;
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/// compose - Compose subreg indices a and b, either may be 0.
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unsigned compose(unsigned, unsigned) const;
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/// isMoveInstr - Return true if MI is a move or subreg instruction.
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bool isMoveInstr(const MachineInstr *MI, unsigned &Src, unsigned &Dst,
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unsigned &SrcSub, unsigned &DstSub) const;
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public:
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CoalescerPair(const TargetInstrInfo &tii, const TargetRegisterInfo &tri)
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: tii_(tii), tri_(tri), dstReg_(0), srcReg_(0), subIdx_(0),
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