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[AVX512] Remove masked load intrinsics. Clang now emits generic masked load intrinsics instead.
The intrinsics will be autoupgraded to the same generic masked loads. llvm-svn: 271362
This commit is contained in:
Craig Topper
parent
9ae9106995
commit
734c8343a6
@ -1935,46 +1935,6 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_avx_maskload_ps_256 : GCCBuiltin<"__builtin_ia32_maskloadps256">,
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Intrinsic<[llvm_v8f32_ty], [llvm_ptr_ty, llvm_v8i32_ty],
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[IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_loadu_ps_128 :
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Intrinsic<[llvm_v4f32_ty],
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[llvm_ptr_ty, llvm_v4f32_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_loadu_ps_256 :
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Intrinsic<[llvm_v8f32_ty],
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[llvm_ptr_ty, llvm_v8f32_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_loadu_ps_512 :
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Intrinsic<[llvm_v16f32_ty],
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[llvm_ptr_ty, llvm_v16f32_ty, llvm_i16_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_loadu_pd_128 :
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Intrinsic<[llvm_v2f64_ty],
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[llvm_ptr_ty, llvm_v2f64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_loadu_pd_256 :
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Intrinsic<[llvm_v4f64_ty],
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[llvm_ptr_ty, llvm_v4f64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_loadu_pd_512 :
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Intrinsic<[llvm_v8f64_ty],
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[llvm_ptr_ty, llvm_v8f64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_load_ps_128 :
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Intrinsic<[llvm_v4f32_ty],
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[llvm_ptr_ty, llvm_v4f32_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_load_ps_256 :
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Intrinsic<[llvm_v8f32_ty],
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[llvm_ptr_ty, llvm_v8f32_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_load_ps_512 :
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Intrinsic<[llvm_v16f32_ty],
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[llvm_ptr_ty, llvm_v16f32_ty, llvm_i16_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_load_pd_128 :
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Intrinsic<[llvm_v2f64_ty],
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[llvm_ptr_ty, llvm_v2f64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_load_pd_256 :
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Intrinsic<[llvm_v4f64_ty],
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[llvm_ptr_ty, llvm_v4f64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_load_pd_512 :
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Intrinsic<[llvm_v8f64_ty],
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[llvm_ptr_ty, llvm_v8f64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
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}
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// Conditional move ops
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@ -2971,66 +2931,6 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_avx2_maskload_q_256 : GCCBuiltin<"__builtin_ia32_maskloadq256">,
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Intrinsic<[llvm_v4i64_ty], [llvm_ptr_ty, llvm_v4i64_ty],
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[IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_loadu_b_128 :
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Intrinsic<[llvm_v16i8_ty],
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[llvm_ptr_ty, llvm_v16i8_ty, llvm_i16_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_loadu_b_256 :
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Intrinsic<[llvm_v32i8_ty],
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[llvm_ptr_ty, llvm_v32i8_ty, llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_loadu_b_512 :
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Intrinsic<[llvm_v64i8_ty],
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[llvm_ptr_ty, llvm_v64i8_ty, llvm_i64_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_loadu_w_128 :
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Intrinsic<[llvm_v8i16_ty],
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[llvm_ptr_ty, llvm_v8i16_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_loadu_w_256 :
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Intrinsic<[llvm_v16i16_ty],
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[llvm_ptr_ty, llvm_v16i16_ty, llvm_i16_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_loadu_w_512 :
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Intrinsic<[llvm_v32i16_ty],
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[llvm_ptr_ty, llvm_v32i16_ty, llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_loadu_d_128 :
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Intrinsic<[llvm_v4i32_ty],
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[llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_loadu_d_256 :
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Intrinsic<[llvm_v8i32_ty],
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[llvm_ptr_ty, llvm_v8i32_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_loadu_d_512 :
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Intrinsic<[llvm_v16i32_ty],
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[llvm_ptr_ty, llvm_v16i32_ty, llvm_i16_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_loadu_q_128 :
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Intrinsic<[llvm_v2i64_ty],
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[llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_loadu_q_256 :
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Intrinsic<[llvm_v4i64_ty],
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[llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_loadu_q_512 :
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Intrinsic<[llvm_v8i64_ty],
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[llvm_ptr_ty, llvm_v8i64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_load_d_128 :
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Intrinsic<[llvm_v4i32_ty],
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[llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_load_d_256 :
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Intrinsic<[llvm_v8i32_ty],
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[llvm_ptr_ty, llvm_v8i32_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_load_d_512 :
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Intrinsic<[llvm_v16i32_ty],
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[llvm_ptr_ty, llvm_v16i32_ty, llvm_i16_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_load_q_128 :
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Intrinsic<[llvm_v2i64_ty],
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[llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_load_q_256 :
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Intrinsic<[llvm_v4i64_ty],
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[llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
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def int_x86_avx512_mask_load_q_512 :
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Intrinsic<[llvm_v8i64_ty],
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[llvm_ptr_ty, llvm_v8i64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
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}
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// Conditional store ops
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@ -204,6 +204,16 @@ static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) {
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Name.startswith("x86.avx512.mask.store.w.") ||
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Name.startswith("x86.avx512.mask.store.d.") ||
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Name.startswith("x86.avx512.mask.store.q.") ||
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Name.startswith("x86.avx512.mask.loadu.p") ||
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Name.startswith("x86.avx512.mask.loadu.b.") ||
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Name.startswith("x86.avx512.mask.loadu.w.") ||
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Name.startswith("x86.avx512.mask.loadu.d.") ||
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Name.startswith("x86.avx512.mask.loadu.q.") ||
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Name.startswith("x86.avx512.mask.load.p") ||
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Name.startswith("x86.avx512.mask.load.b.") ||
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Name.startswith("x86.avx512.mask.load.w.") ||
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Name.startswith("x86.avx512.mask.load.d.") ||
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Name.startswith("x86.avx512.mask.load.q.") ||
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Name == "x86.sse42.crc32.64.8" ||
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Name.startswith("x86.avx.vbroadcast.s") ||
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Name.startswith("x86.sse2.psll.dq") ||
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@ -395,13 +405,47 @@ static Value *UpgradeMaskedStore(IRBuilder<> &Builder, LLVMContext &C,
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for (unsigned i = 0; i != NumElts; ++i)
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Indices[i] = i;
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Mask = Builder.CreateShuffleVector(Mask, Mask,
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makeArrayRef(Indices, NumElts),
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"extract");
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makeArrayRef(Indices, NumElts),
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"extract");
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}
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return Builder.CreateMaskedStore(Data, Ptr, Align, Mask);
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}
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static Value *UpgradeMaskedLoad(IRBuilder<> &Builder, LLVMContext &C,
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Value *Ptr, Value *Passthru, Value *Mask,
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bool Aligned) {
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// Cast the pointer to the right type.
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Ptr = Builder.CreateBitCast(Ptr,
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llvm::PointerType::getUnqual(Passthru->getType()));
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unsigned Align =
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Aligned ? cast<VectorType>(Passthru->getType())->getBitWidth() / 8 : 1;
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// If the mask is all ones just emit a regular store.
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if (const auto *C = dyn_cast<Constant>(Mask))
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if (C->isAllOnesValue())
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return Builder.CreateAlignedLoad(Ptr, Align);
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// Convert the mask from an integer type to a vector of i1.
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unsigned NumElts = Passthru->getType()->getVectorNumElements();
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llvm::VectorType *MaskTy = llvm::VectorType::get(Builder.getInt1Ty(),
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cast<IntegerType>(Mask->getType())->getBitWidth());
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Mask = Builder.CreateBitCast(Mask, MaskTy);
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// If we have less than 8 elements, then the starting mask was an i8 and
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// we need to extract down to the right number of elements.
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if (NumElts < 8) {
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int Indices[4];
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for (unsigned i = 0; i != NumElts; ++i)
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Indices[i] = i;
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Mask = Builder.CreateShuffleVector(Mask, Mask,
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makeArrayRef(Indices, NumElts),
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"extract");
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}
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return Builder.CreateMaskedLoad(Ptr, Align, Mask, Passthru);
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}
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// UpgradeIntrinsicCall - Upgrade a call to an old intrinsic to be a call the
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// upgraded intrinsic. All argument and return casting must be provided in
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// order to seamlessly integrate with existing context.
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@ -525,6 +569,22 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) {
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// Remove intrinsic.
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CI->eraseFromParent();
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return;
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} else if (Name.startswith("llvm.x86.avx512.mask.loadu.p") ||
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Name.startswith("llvm.x86.avx512.mask.loadu.b.") ||
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Name.startswith("llvm.x86.avx512.mask.loadu.w.") ||
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Name.startswith("llvm.x86.avx512.mask.loadu.d.") ||
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Name.startswith("llvm.x86.avx512.mask.loadu.q.")) {
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Rep = UpgradeMaskedLoad(Builder, C, CI->getArgOperand(0),
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CI->getArgOperand(1), CI->getArgOperand(2),
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/*Aligned*/false);
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} else if (Name.startswith("llvm.x86.avx512.mask.load.p") ||
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Name.startswith("llvm.x86.avx512.mask.load.b.") ||
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Name.startswith("llvm.x86.avx512.mask.load.w.") ||
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Name.startswith("llvm.x86.avx512.mask.load.d.") ||
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Name.startswith("llvm.x86.avx512.mask.load.q.")) {
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Rep = UpgradeMaskedStore(Builder, C, CI->getArgOperand(0),
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CI->getArgOperand(1),CI->getArgOperand(2),
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/*Aligned*/true);
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} else if (Name.startswith("llvm.x86.xop.vpcom")) {
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Intrinsic::ID intID;
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if (Name.endswith("ub"))
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@ -148,36 +148,6 @@ static const IntrinsicData IntrinsicsWithChain[] = {
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EXPAND_FROM_MEM, X86ISD::EXPAND, 0),
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X86_INTRINSIC_DATA(avx512_mask_expand_load_q_512,
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EXPAND_FROM_MEM, X86ISD::EXPAND, 0),
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X86_INTRINSIC_DATA(avx512_mask_load_d_128, LOADA, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_load_d_256, LOADA, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_load_d_512, LOADA, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_load_pd_128, LOADA, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_load_pd_256, LOADA, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_load_pd_512, LOADA, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_load_ps_128, LOADA, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_load_ps_256, LOADA, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_load_ps_512, LOADA, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_load_q_128, LOADA, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_load_q_256, LOADA, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_load_q_512, LOADA, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_loadu_b_128, LOADU, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_loadu_b_256, LOADU, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_loadu_b_512, LOADU, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_loadu_d_128, LOADU, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_loadu_d_256, LOADU, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_loadu_d_512, LOADU, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_loadu_pd_128, LOADU, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_loadu_pd_256, LOADU, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_loadu_pd_512, LOADU, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_loadu_ps_128, LOADU, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_loadu_ps_256, LOADU, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_loadu_ps_512, LOADU, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_loadu_q_128, LOADU, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_loadu_q_256, LOADU, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_loadu_q_512, LOADU, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_loadu_w_128, LOADU, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_loadu_w_256, LOADU, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_loadu_w_512, LOADU, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmov_db_mem_128, TRUNCATE_TO_MEM_VI8,
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X86ISD::VTRUNC, 0),
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X86_INTRINSIC_DATA(avx512_mask_pmov_db_mem_256, TRUNCATE_TO_MEM_VI8,
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@ -3202,8 +3202,8 @@ declare <32 x i16> @llvm.x86.avx512.mask.loadu.w.512(i8*, <32 x i16>, i32)
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define <32 x i16>@test_int_x86_avx512_mask_loadu_w_512(i8* %ptr, i8* %ptr2, <32 x i16> %x1, i32 %mask) {
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; AVX512BW-LABEL: test_int_x86_avx512_mask_loadu_w_512:
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; AVX512BW: ## BB#0:
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; AVX512BW-NEXT: kmovd %edx, %k1
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; AVX512BW-NEXT: vmovdqu16 (%rdi), %zmm0
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; AVX512BW-NEXT: kmovd %edx, %k1
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; AVX512BW-NEXT: vmovdqu16 (%rsi), %zmm0 {%k1}
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; AVX512BW-NEXT: vmovdqu16 (%rdi), %zmm1 {%k1} {z}
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; AVX512BW-NEXT: vpaddw %zmm1, %zmm0, %zmm0
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@ -3212,9 +3212,9 @@ define <32 x i16>@test_int_x86_avx512_mask_loadu_w_512(i8* %ptr, i8* %ptr2, <32
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; AVX512F-32-LABEL: test_int_x86_avx512_mask_loadu_w_512:
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; AVX512F-32: # BB#0:
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; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; AVX512F-32-NEXT: kmovd {{[0-9]+}}(%esp), %k1
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; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; AVX512F-32-NEXT: vmovdqu16 (%ecx), %zmm0
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; AVX512F-32-NEXT: kmovd {{[0-9]+}}(%esp), %k1
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; AVX512F-32-NEXT: vmovdqu16 (%eax), %zmm0 {%k1}
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; AVX512F-32-NEXT: vmovdqu16 (%ecx), %zmm1 {%k1} {z}
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; AVX512F-32-NEXT: vpaddw %zmm1, %zmm0, %zmm0
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@ -3231,8 +3231,8 @@ declare <64 x i8> @llvm.x86.avx512.mask.loadu.b.512(i8*, <64 x i8>, i64)
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define <64 x i8>@test_int_x86_avx512_mask_loadu_b_512(i8* %ptr, i8* %ptr2, <64 x i8> %x1, i64 %mask) {
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; AVX512BW-LABEL: test_int_x86_avx512_mask_loadu_b_512:
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; AVX512BW: ## BB#0:
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; AVX512BW-NEXT: kmovq %rdx, %k1
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; AVX512BW-NEXT: vmovdqu8 (%rdi), %zmm0
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; AVX512BW-NEXT: kmovq %rdx, %k1
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; AVX512BW-NEXT: vmovdqu8 (%rsi), %zmm0 {%k1}
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; AVX512BW-NEXT: vmovdqu8 (%rdi), %zmm1 {%k1} {z}
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; AVX512BW-NEXT: vpaddb %zmm1, %zmm0, %zmm0
|
||||
@ -3243,9 +3243,7 @@ define <64 x i8>@test_int_x86_avx512_mask_loadu_b_512(i8* %ptr, i8* %ptr2, <64 x
|
||||
; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; AVX512F-32-NEXT: vmovdqu8 (%ecx), %zmm0
|
||||
; AVX512F-32-NEXT: kmovd {{[0-9]+}}(%esp), %k0
|
||||
; AVX512F-32-NEXT: kmovd {{[0-9]+}}(%esp), %k1
|
||||
; AVX512F-32-NEXT: kunpckdq %k0, %k1, %k1
|
||||
; AVX512F-32-NEXT: kmovq {{[0-9]+}}(%esp), %k1
|
||||
; AVX512F-32-NEXT: vmovdqu8 (%eax), %zmm0 {%k1}
|
||||
; AVX512F-32-NEXT: vmovdqu8 (%ecx), %zmm1 {%k1} {z}
|
||||
; AVX512F-32-NEXT: vpaddb %zmm1, %zmm0, %zmm0
|
||||
|
||||
@ -6230,8 +6230,8 @@ declare <8 x i16> @llvm.x86.avx512.mask.loadu.w.128(i8*, <8 x i16>, i8)
|
||||
define <8 x i16>@test_int_x86_avx512_mask_loadu_w_128(i8* %ptr, i8* %ptr2, <8 x i16> %x1, i8 %mask) {
|
||||
; CHECK-LABEL: test_int_x86_avx512_mask_loadu_w_128:
|
||||
; CHECK: ## BB#0:
|
||||
; CHECK-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
|
||||
; CHECK-NEXT: vmovdqu16 (%rdi), %xmm0 ## encoding: [0x62,0xf1,0xff,0x08,0x6f,0x07]
|
||||
; CHECK-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
|
||||
; CHECK-NEXT: vmovdqu16 (%rsi), %xmm0 {%k1} ## encoding: [0x62,0xf1,0xff,0x09,0x6f,0x06]
|
||||
; CHECK-NEXT: vmovdqu16 (%rdi), %xmm1 {%k1} {z} ## encoding: [0x62,0xf1,0xff,0x89,0x6f,0x0f]
|
||||
; CHECK-NEXT: vpaddw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xfd,0xc1]
|
||||
@ -6248,8 +6248,8 @@ declare <16 x i16> @llvm.x86.avx512.mask.loadu.w.256(i8*, <16 x i16>, i16)
|
||||
define <16 x i16>@test_int_x86_avx512_mask_loadu_w_256(i8* %ptr, i8* %ptr2, <16 x i16> %x1, i16 %mask) {
|
||||
; CHECK-LABEL: test_int_x86_avx512_mask_loadu_w_256:
|
||||
; CHECK: ## BB#0:
|
||||
; CHECK-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
|
||||
; CHECK-NEXT: vmovdqu16 (%rdi), %ymm0 ## encoding: [0x62,0xf1,0xff,0x28,0x6f,0x07]
|
||||
; CHECK-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
|
||||
; CHECK-NEXT: vmovdqu16 (%rsi), %ymm0 {%k1} ## encoding: [0x62,0xf1,0xff,0x29,0x6f,0x06]
|
||||
; CHECK-NEXT: vmovdqu16 (%rdi), %ymm1 {%k1} {z} ## encoding: [0x62,0xf1,0xff,0xa9,0x6f,0x0f]
|
||||
; CHECK-NEXT: vpaddw %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xfd,0xc1]
|
||||
@ -6266,8 +6266,8 @@ declare <16 x i8> @llvm.x86.avx512.mask.loadu.b.128(i8*, <16 x i8>, i16)
|
||||
define <16 x i8>@test_int_x86_avx512_mask_loadu_b_128(i8* %ptr, i8* %ptr2, <16 x i8> %x1, i16 %mask) {
|
||||
; CHECK-LABEL: test_int_x86_avx512_mask_loadu_b_128:
|
||||
; CHECK: ## BB#0:
|
||||
; CHECK-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
|
||||
; CHECK-NEXT: vmovdqu8 (%rdi), %xmm0 ## encoding: [0x62,0xf1,0x7f,0x08,0x6f,0x07]
|
||||
; CHECK-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
|
||||
; CHECK-NEXT: vmovdqu8 (%rsi), %xmm0 {%k1} ## encoding: [0x62,0xf1,0x7f,0x09,0x6f,0x06]
|
||||
; CHECK-NEXT: vmovdqu8 (%rdi), %xmm1 {%k1} {z} ## encoding: [0x62,0xf1,0x7f,0x89,0x6f,0x0f]
|
||||
; CHECK-NEXT: vpaddb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xfc,0xc1]
|
||||
@ -6284,8 +6284,8 @@ declare <32 x i8> @llvm.x86.avx512.mask.loadu.b.256(i8*, <32 x i8>, i32)
|
||||
define <32 x i8>@test_int_x86_avx512_mask_loadu_b_256(i8* %ptr, i8* %ptr2, <32 x i8> %x1, i32 %mask) {
|
||||
; CHECK-LABEL: test_int_x86_avx512_mask_loadu_b_256:
|
||||
; CHECK: ## BB#0:
|
||||
; CHECK-NEXT: kmovd %edx, %k1 ## encoding: [0xc5,0xfb,0x92,0xca]
|
||||
; CHECK-NEXT: vmovdqu8 (%rdi), %ymm0 ## encoding: [0x62,0xf1,0x7f,0x28,0x6f,0x07]
|
||||
; CHECK-NEXT: kmovd %edx, %k1 ## encoding: [0xc5,0xfb,0x92,0xca]
|
||||
; CHECK-NEXT: vmovdqu8 (%rsi), %ymm0 {%k1} ## encoding: [0x62,0xf1,0x7f,0x29,0x6f,0x06]
|
||||
; CHECK-NEXT: vmovdqu8 (%rdi), %ymm1 {%k1} {z} ## encoding: [0x62,0xf1,0x7f,0xa9,0x6f,0x0f]
|
||||
; CHECK-NEXT: vpaddb %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xfc,0xc1]
|
||||
|
||||
Loading…
Reference in New Issue
Block a user