mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2025-02-01 05:01:59 +01:00
[CXX_FAST_TLS] fix issues with O0 on ARM, AArch64 and X86.
Since at O0, explicit copies via SplitCSR may not be removed even if they are unnecessary, we choose not to use SplitCSR at O0. llvm-svn: 263855
This commit is contained in:
Manman Ren
parent
a213e383a5
commit
73603a411f
@ -473,7 +473,7 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
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// We split CSR if the target supports it for the given function
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// and the function has only return exits.
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if (TLI->supportSplitCSR(MF)) {
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if (OptLevel != CodeGenOpt::None && TLI->supportSplitCSR(MF)) {
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FuncInfo->SplitCSR = true;
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// Collect all the return blocks.
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@ -2469,6 +2469,7 @@ CCAssignFn *AArch64TargetLowering::CCAssignFnForCall(CallingConv::ID CC,
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case CallingConv::C:
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case CallingConv::Fast:
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case CallingConv::PreserveMost:
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case CallingConv::CXX_FAST_TLS:
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if (!Subtarget->isTargetDarwin())
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return CC_AArch64_AAPCS;
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return IsVarArg ? CC_AArch64_DarwinPCS_VarArg : CC_AArch64_DarwinPCS;
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@ -1847,6 +1847,7 @@ CCAssignFn *ARMFastISel::CCAssignFnForCall(CallingConv::ID CC,
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}
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// Fallthrough
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case CallingConv::C:
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case CallingConv::CXX_FAST_TLS:
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// Use target triple & subtarget features to do actual dispatch.
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if (Subtarget->isAAPCS_ABI()) {
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if (Subtarget->hasVFP2() &&
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@ -3,6 +3,8 @@
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; Shrink wrapping currently does not kick in because we have a TLS CALL
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; in the entry block and it will clobber the link register.
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; RUN: llc < %s -mtriple=aarch64-apple-ios -O0 | FileCheck --check-prefix=CHECK-O0 %s
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%struct.S = type { i8 }
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@sg = internal thread_local global %struct.S zeroinitializer, align 1
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@ -76,6 +78,52 @@ __tls_init.exit:
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; CHECK-NOT: ldp d29, d28
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; CHECK-NOT: ldp d31, d30
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; CHECK-O0-LABEL: _ZTW2sg
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; CHECK-O0: stp d31, d30
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; CHECK-O0: stp d29, d28
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; CHECK-O0: stp d27, d26
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; CHECK-O0: stp d25, d24
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; CHECK-O0: stp d23, d22
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; CHECK-O0: stp d21, d20
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; CHECK-O0: stp d19, d18
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; CHECK-O0: stp d17, d16
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; CHECK-O0: stp d7, d6
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; CHECK-O0: stp d5, d4
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; CHECK-O0: stp d3, d2
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; CHECK-O0: stp d1, d0
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; CHECK-O0: stp x14, x13
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; CHECK-O0: stp x12, x11
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; CHECK-O0: stp x10, x9
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; CHECK-O0: stp x8, x7
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; CHECK-O0: stp x6, x5
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; CHECK-O0: stp x4, x3
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; CHECK-O0: stp x2, x1
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; CHECK-O0: blr
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; CHECK-O0: tbnz w{{.*}}, #0, [[BB_end:.?LBB0_[0-9]+]]
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; CHECK-O0: blr
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; CHECK-O0: tlv_atexit
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; CHECK-O0: [[BB_end]]:
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; CHECK-O0: blr
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; CHECK-O0: ldp x2, x1
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; CHECK-O0: ldp x4, x3
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; CHECK-O0: ldp x6, x5
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; CHECK-O0: ldp x8, x7
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; CHECK-O0: ldp x10, x9
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; CHECK-O0: ldp x12, x11
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; CHECK-O0: ldp x14, x13
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; CHECK-O0: ldp d1, d0
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; CHECK-O0: ldp d3, d2
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; CHECK-O0: ldp d5, d4
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; CHECK-O0: ldp d7, d6
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; CHECK-O0: ldp d17, d16
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; CHECK-O0: ldp d19, d18
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; CHECK-O0: ldp d21, d20
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; CHECK-O0: ldp d23, d22
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; CHECK-O0: ldp d25, d24
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; CHECK-O0: ldp d27, d26
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; CHECK-O0: ldp d29, d28
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; CHECK-O0: ldp d31, d30
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; CHECK-LABEL: _ZTW4sum1
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; CHECK-NOT: stp d31, d30
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; CHECK-NOT: stp d29, d28
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@ -98,6 +146,64 @@ __tls_init.exit:
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; CHECK-NOT: stp x4, x3
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; CHECK-NOT: stp x2, x1
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; CHECK: blr
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; CHECK-O0-LABEL: _ZTW4sum1
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; CHECK-O0-NOT: vstr
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; CHECK-O0-NOT: vldr
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define cxx_fast_tlscc nonnull i32* @_ZTW4sum1() nounwind {
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ret i32* @sum1
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}
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; Make sure at O0, we don't generate spilling/reloading of the CSRs.
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; CHECK-O0-LABEL: tls_test2
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; CHECK-O0-NOT: stp d31, d30
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; CHECK-O0-NOT: stp d29, d28
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; CHECK-O0-NOT: stp d27, d26
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; CHECK-O0-NOT: stp d25, d24
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; CHECK-O0-NOT: stp d23, d22
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; CHECK-O0-NOT: stp d21, d20
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; CHECK-O0-NOT: stp d19, d18
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; CHECK-O0-NOT: stp d17, d16
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; CHECK-O0-NOT: stp d7, d6
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; CHECK-O0-NOT: stp d5, d4
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; CHECK-O0-NOT: stp d3, d2
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; CHECK-O0-NOT: stp d1, d0
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; CHECK-O0-NOT: stp x20, x19
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; CHECK-O0-NOT: stp x14, x13
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; CHECK-O0-NOT: stp x12, x11
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; CHECK-O0-NOT: stp x10, x9
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; CHECK-O0-NOT: stp x8, x7
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; CHECK-O0-NOT: stp x6, x5
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; CHECK-O0-NOT: stp x4, x3
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; CHECK-O0-NOT: stp x2, x1
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; CHECK-O0: bl {{.*}}tls_helper
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; CHECK-O0-NOT: ldp x2, x1
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; CHECK-O0-NOT: ldp x4, x3
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; CHECK-O0-NOT: ldp x6, x5
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; CHECK-O0-NOT: ldp x8, x7
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; CHECK-O0-NOT: ldp x10, x9
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; CHECK-O0-NOT: ldp x12, x11
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; CHECK-O0-NOT: ldp x14, x13
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; CHECK-O0-NOT: ldp x20, x19
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; CHECK-O0-NOT: ldp d1, d0
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; CHECK-O0-NOT: ldp d3, d2
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; CHECK-O0-NOT: ldp d5, d4
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; CHECK-O0-NOT: ldp d7, d6
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; CHECK-O0-NOT: ldp d17, d16
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; CHECK-O0-NOT: ldp d19, d18
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; CHECK-O0-NOT: ldp d21, d20
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; CHECK-O0-NOT: ldp d23, d22
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; CHECK-O0-NOT: ldp d25, d24
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; CHECK-O0-NOT: ldp d27, d26
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; CHECK-O0-NOT: ldp d29, d28
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; CHECK-O0-NOT: ldp d31, d30
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; CHECK-O0: ret
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%class.C = type { i32 }
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@tC = internal thread_local global %class.C zeroinitializer, align 4
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declare cxx_fast_tlscc void @tls_helper()
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define cxx_fast_tlscc %class.C* @tls_test2() #1 {
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call cxx_fast_tlscc void @tls_helper()
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ret %class.C* @tC
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}
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attributes #0 = { nounwind "no-frame-pointer-elim"="true" }
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attributes #1 = { nounwind }
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@ -3,6 +3,9 @@
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; RUN: llc < %s -mtriple=armv7-apple-ios8.0 | FileCheck %s
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; RUN: llc < %s -mtriple=armv7-apple-ios8.0 -enable-shrink-wrap=true | FileCheck --check-prefix=CHECK %s
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; RUN: llc < %s -mtriple=armv7k-apple-watchos2.0 -O0 | FileCheck --check-prefix=CHECK-O0 --check-prefix=WATCH-O0 %s
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; RUN: llc < %s -mtriple=armv7-apple-ios8.0 -O0 | FileCheck --check-prefix=CHECK-O0 --check-prefix=IOS-O0 %s
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%struct.S = type { i8 }
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@sg = internal thread_local global %struct.S zeroinitializer, align 1
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@ -10,6 +13,9 @@
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@__tls_guard = internal thread_local unnamed_addr global i1 false
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@sum1 = internal thread_local global i32 0, align 4
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%class.C = type { i32 }
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@tC = internal thread_local global %class.C zeroinitializer, align 4
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declare %struct.S* @_ZN1SC1Ev(%struct.S* returned)
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declare %struct.S* @_ZN1SD1Ev(%struct.S* returned)
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declare i32 @_tlv_atexit(void (i8*)*, i8*, i8*)
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@ -36,7 +42,7 @@ __tls_init.exit:
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; CHECK-NOT: vpush {d0, d1, d2, d3, d4, d5, d6, d7}
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; CHECK: blx
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; CHECK: bne [[BB_end:.?LBB0_[0-9]+]]
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; CHECK; blx
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; CHECK: blx
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; CHECK: tlv_atexit
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; CHECK: [[BB_end]]:
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; CHECK: blx
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@ -46,12 +52,54 @@ __tls_init.exit:
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; CHECK-NOT: pop {r1, r2, r3, r4, r7, pc}
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; CHECK: pop {lr}
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; CHECK-O0-LABEL: _ZTW2sg
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; WATCH-O0: push {r1, r2, r3, r6, r7, lr}
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; IOS-O0: push {r1, r2, r3, r7, lr}
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; CHECK-O0: push {r9, r12}
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; CHECK-O0: vpush {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31}
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; CHECK-O0: vpush {d0, d1, d2, d3, d4, d5, d6, d7}
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; CHECK-O0: blx
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; CHECK-O0: bne [[BB_end:.?LBB0_[0-9]+]]
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; CHECK-O0: blx
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; CHECK-O0: tlv_atexit
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; CHECK-O0: [[BB_end]]:
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; CHECK-O0: blx
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; CHECK-O0: vpop {d0, d1, d2, d3, d4, d5, d6, d7}
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; CHECK-O0: vpop {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31}
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; CHECK-O0: pop {r9, r12}
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; WATCH-O0: pop {r1, r2, r3, r6, r7, pc}
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; IOS-O0: pop {r1, r2, r3, r7, pc}
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; CHECK-LABEL: _ZTW4sum1
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; CHECK-NOT: push {r1, r2, r3, r4, r7, lr}
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; CHECK-NOT: push {r9, r12}
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; CHECK-NOT: vpush {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31}
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; CHECK-NOT: vpush {d0, d1, d2, d3, d4, d5, d6, d7}
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; CHECK: blx
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; CHECK-O0-LABEL: _ZTW4sum1
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; CHECK-O0-NOT: vpush
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; CHECK-O0-NOT: vstr
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; CHECK-O0-NOT: vpop
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; CHECK-O0-NOT: vldr
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; CHECK-O0: pop
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define cxx_fast_tlscc nonnull i32* @_ZTW4sum1() nounwind {
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ret i32* @sum1
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}
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; Make sure at O0, we don't generate spilling/reloading of the CSRs.
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; CHECK-O0-LABEL: tls_test2
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; CHECK-O0: push
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; CHECK-O0-NOT: vpush
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; CHECK-O0-NOT: vstr
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; CHECK-O0: tls_helper
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; CHECK-O0-NOT: vpop
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; CHECK-O0-NOT: vldr
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; CHECK-O0: pop
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declare cxx_fast_tlscc void @tls_helper()
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define cxx_fast_tlscc %class.C* @tls_test2() #1 {
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call cxx_fast_tlscc void @tls_helper()
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ret %class.C* @tC
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}
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attributes #0 = { nounwind "no-frame-pointer-elim"="true" }
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attributes #1 = { nounwind }
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@ -39,6 +39,27 @@ declare i32 @_tlv_atexit(void (i8*)*, i8*, i8*)
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; CHECK-NOT: popq %r9
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; CHECK-NOT: popq %r10
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; CHECK-NOT: popq %r11
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; CHECK-O0-LABEL: _ZTW2sg
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; CHECK-O0: pushq %r11
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; CHECK-O0: pushq %r10
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; CHECK-O0: pushq %r9
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; CHECK-O0: pushq %r8
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; CHECK-O0: pushq %rsi
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; CHECK-O0: pushq %rdx
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; CHECK-O0: pushq %rcx
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; CHECK-O0: callq
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; CHECK-O0: jne
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; CHECK-O0: callq
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; CHECK-O0: tlv_atexit
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; CHECK-O0: callq
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; CHECK-O0: popq %rcx
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; CHECK-O0: popq %rdx
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; CHECK-O0: popq %rsi
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; CHECK-O0: popq %r8
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; CHECK-O0: popq %r9
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; CHECK-O0: popq %r10
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; CHECK-O0: popq %r11
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define cxx_fast_tlscc nonnull %struct.S* @_ZTW2sg() nounwind {
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%.b.i = load i1, i1* @__tls_guard, align 1
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br i1 %.b.i, label %__tls_init.exit, label %init.i
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@ -63,6 +84,24 @@ __tls_init.exit:
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; CHECK-NOT: pushq %rcx
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; CHECK-NOT: pushq %rbx
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; CHECK: callq
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; CHECK-O0-LABEL: _ZTW4sum1
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; CHECK-O0-NOT: pushq %r11
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; CHECK-O0-NOT: pushq %r10
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; CHECK-O0-NOT: pushq %r9
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; CHECK-O0-NOT: pushq %r8
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; CHECK-O0-NOT: pushq %rsi
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; CHECK-O0-NOT: pushq %rdx
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; CHECK-O0-NOT: pushq %rcx
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; CHECK-O0-NOT: pushq %rbx
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; CHECK-O0-NOT: movq %r11
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; CHECK-O0-NOT: movq %r10
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; CHECK-O0-NOT: movq %r9
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; CHECK-O0-NOT: movq %r8
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; CHECK-O0-NOT: movq %rsi
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; CHECK-O0-NOT: movq %rdx
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; CHECK-O0-NOT: movq %rcx
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; CHECK-O0-NOT: movq %rbx
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; CHECK-O0: callq
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define cxx_fast_tlscc nonnull i32* @_ZTW4sum1() nounwind {
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ret i32* @sum1
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}
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@ -76,4 +115,28 @@ define cxx_fast_tlscc i32* @_ZTW4sum2() #0 {
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ret i32* @sum1
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}
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; Make sure at O0, we don't generate spilling/reloading of the CSRs.
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; CHECK-O0-LABEL: tls_test2
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; CHECK-O0-NOT: pushq %r11
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; CHECK-O0-NOT: pushq %r10
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; CHECK-O0-NOT: pushq %r9
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; CHECK-O0-NOT: pushq %r8
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; CHECK-O0-NOT: pushq %rsi
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; CHECK-O0-NOT: pushq %rdx
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; CHECK-O0: callq {{.*}}tls_helper
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; CHECK-O0-NOT: popq %rdx
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; CHECK-O0-NOT: popq %rsi
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; CHECK-O0-NOT: popq %r8
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; CHECK-O0-NOT: popq %r9
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; CHECK-O0-NOT: popq %r10
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; CHECK-O0-NOT: popq %r11
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; CHECK-O0: ret
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%class.C = type { i32 }
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@tC = internal thread_local global %class.C zeroinitializer, align 4
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declare cxx_fast_tlscc void @tls_helper()
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define cxx_fast_tlscc %class.C* @tls_test2() #1 {
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call cxx_fast_tlscc void @tls_helper()
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ret %class.C* @tC
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}
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attributes #0 = { nounwind "no-frame-pointer-elim"="true" }
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attributes #1 = { nounwind }
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