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GlobalISel: add support for G_MUL

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llvm-svn: 277774
This commit is contained in:
Tim Northover 2016-08-04 21:39:44 +00:00
parent 15288e726c
commit 73cd86e9c7
4 changed files with 30 additions and 2 deletions
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8
include/llvm/Target/GenericOpcodes.td
View File

@ -85,6 +85,14 @@ def G_SUB : Instruction {
let isCommutable = 0;
}
// Generic subtraction.
def G_MUL : Instruction {
let OutOperandList = (outs unknown:$dst);
let InOperandList = (ins unknown:$src1, unknown:$src2);
let hasSideEffects = 0;
let isCommutable = 1;
}
// Generic addition consuming and producing a carry flag.
def G_ADDE : Instruction {
let OutOperandList = (outs unknown:$dst, unknown:$carry_out);

11
include/llvm/Target/TargetOpcodes.def
View File

@ -166,7 +166,10 @@ HANDLE_TARGET_OPCODE(G_ADDE)
/// Generic SUB instruction. This is an integer sub.
HANDLE_TARGET_OPCODE(G_SUB)
/// Generic Bitwise-AND instruction.
// Generic multiply instruction.
HANDLE_TARGET_OPCODE(G_MUL)
/// Generic bitwise and instruction.
HANDLE_TARGET_OPCODE(G_AND)
/// Generic bitwise or instruction.
@ -175,6 +178,7 @@ HANDLE_TARGET_OPCODE(G_OR)
/// Generic bitwise exclusive-or instruction.
HANDLE_TARGET_OPCODE(G_XOR)
/// Generic instruction to materialize the address of an alloca or other
/// stack-based object.
HANDLE_TARGET_OPCODE(G_FRAME_INDEX)
@ -215,7 +219,10 @@ HANDLE_TARGET_OPCODE(G_INTRINSIC_W_SIDE_EFFECTS)
/// Generic extension allowing rubbish in high bits.
HANDLE_TARGET_OPCODE(G_ANYEXTEND)
/// Generic truncation.
/// Generic instruction to discard the high bits of a register. This differs
/// from (G_EXTRACT val, 0) on its action on vectors: G_TRUNC will truncate
/// each element individually, G_EXTRACT will typically discard the high
/// elements of the vector.
HANDLE_TARGET_OPCODE(G_TRUNC)
/// Generic integer constant.

2
lib/CodeGen/GlobalISel/IRTranslator.cpp
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@ -237,6 +237,8 @@ bool IRTranslator::translate(const Instruction &Inst) {
// Bitwise operations.
case Instruction::And:
return translateBinaryOp(TargetOpcode::G_AND, cast<BinaryOperator>(Inst));
case Instruction::Mul:
return translateBinaryOp(TargetOpcode::G_MUL, cast<BinaryOperator>(Inst));
case Instruction::Or:
return translateBinaryOp(TargetOpcode::G_OR, cast<BinaryOperator>(Inst));
case Instruction::Xor:

11
test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
View File

@ -17,6 +17,17 @@ define i64 @addi64(i64 %arg1, i64 %arg2) {
ret i64 %res
}
; CHECK-LABEL: name: muli64
; CHECK: [[ARG1:%[0-9]+]](64) = COPY %x0
; CHECK-NEXT: [[ARG2:%[0-9]+]](64) = COPY %x1
; CHECK-NEXT: [[RES:%[0-9]+]](64) = G_MUL s64 [[ARG1]], [[ARG2]]
; CHECK-NEXT: %x0 = COPY [[RES]]
; CHECK-NEXT: RET_ReallyLR implicit %x0
define i64 @muli64(i64 %arg1, i64 %arg2) {
%res = mul i64 %arg1, %arg2
ret i64 %res
}
; Tests for alloca
; CHECK-LABEL: name: allocai64
; CHECK: stack: