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[X86] Add PR40483 test cases
Demonstrate failure to merge ISD::ADD(x,y)/X86ISD::ADD(x,y) + ISD::SUB(x,y)/X86ISD::SUB(x,y) equivalent ops llvm-svn: 354758
This commit is contained in:
Simon Pilgrim
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54af6d75eb
commit
73db599280
92
test/CodeGen/X86/combine-adc.ll
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92
test/CodeGen/X86/combine-adc.ll
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@ -0,0 +1,92 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
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define i32 @PR40483_add1(i32*, i32) nounwind {
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; X86-LABEL: PR40483_add1:
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; X86: # %bb.0:
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; X86-NEXT: pushl %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl (%edx), %esi
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; X86-NEXT: leal (%esi,%ecx), %eax
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; X86-NEXT: addl %ecx, %esi
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; X86-NEXT: movl %esi, (%edx)
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; X86-NEXT: jae .LBB0_1
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; X86-NEXT: # %bb.2:
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: popl %esi
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; X86-NEXT: retl
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; X86-NEXT: .LBB0_1:
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; X86-NEXT: orl %eax, %eax
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; X86-NEXT: popl %esi
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; X86-NEXT: retl
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;
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; X64-LABEL: PR40483_add1:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $esi killed $esi def $rsi
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; X64-NEXT: movl (%rdi), %ecx
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; X64-NEXT: leal (%rcx,%rsi), %edx
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; X64-NEXT: orl %edx, %edx
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: addl %esi, %ecx
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; X64-NEXT: movl %ecx, (%rdi)
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; X64-NEXT: cmovael %edx, %eax
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; X64-NEXT: retq
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%3 = load i32, i32* %0, align 8
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%4 = tail call { i8, i32 } @llvm.x86.addcarry.32(i8 0, i32 %3, i32 %1)
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%5 = extractvalue { i8, i32 } %4, 1
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store i32 %5, i32* %0, align 8
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%6 = extractvalue { i8, i32 } %4, 0
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%7 = icmp eq i8 %6, 0
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%8 = add i32 %1, %3
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%9 = or i32 %5, %8
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%10 = select i1 %7, i32 %9, i32 0
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ret i32 %10
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}
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define i32 @PR40483_add2(i32*, i32) nounwind {
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; X86-LABEL: PR40483_add2:
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; X86: # %bb.0:
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; X86-NEXT: pushl %edi
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; X86-NEXT: pushl %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: movl (%esi), %edi
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; X86-NEXT: leal (%edi,%edx), %ecx
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: addl %edx, %edi
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; X86-NEXT: movl %edi, (%esi)
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; X86-NEXT: jae .LBB1_2
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; X86-NEXT: # %bb.1:
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; X86-NEXT: orl %ecx, %ecx
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: .LBB1_2:
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; X86-NEXT: popl %esi
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; X86-NEXT: popl %edi
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; X86-NEXT: retl
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;
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; X64-LABEL: PR40483_add2:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $esi killed $esi def $rsi
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; X64-NEXT: movl (%rdi), %ecx
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; X64-NEXT: leal (%rcx,%rsi), %edx
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; X64-NEXT: orl %edx, %edx
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: addl %esi, %ecx
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; X64-NEXT: movl %ecx, (%rdi)
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; X64-NEXT: cmovbl %edx, %eax
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; X64-NEXT: retq
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%3 = load i32, i32* %0, align 8
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%4 = tail call { i8, i32 } @llvm.x86.addcarry.32(i8 0, i32 %3, i32 %1)
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%5 = extractvalue { i8, i32 } %4, 1
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store i32 %5, i32* %0, align 8
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%6 = extractvalue { i8, i32 } %4, 0
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%7 = icmp eq i8 %6, 0
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%8 = add i32 %3, %1
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%9 = or i32 %5, %8
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%10 = select i1 %7, i32 0, i32 %9
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ret i32 %10
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}
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declare { i8, i32 } @llvm.x86.addcarry.32(i8, i32, i32)
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@ -196,4 +196,99 @@ define i32 @PR40483_sub2(i32*, i32) nounwind {
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ret i32 %7
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}
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define i32 @PR40483_sub3(i32*, i32) nounwind {
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; X86-LABEL: PR40483_sub3:
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; X86: # %bb.0:
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; X86-NEXT: pushl %edi
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; X86-NEXT: pushl %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: movl (%esi), %edx
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; X86-NEXT: movl %edx, %eax
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; X86-NEXT: subl %ecx, %eax
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; X86-NEXT: movl %edx, %edi
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; X86-NEXT: subl %ecx, %edi
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; X86-NEXT: movl %edi, (%esi)
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; X86-NEXT: jae .LBB5_1
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; X86-NEXT: # %bb.2:
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: jmp .LBB5_3
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; X86-NEXT: .LBB5_1:
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; X86-NEXT: subl %edx, %ecx
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; X86-NEXT: orl %ecx, %eax
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; X86-NEXT: .LBB5_3:
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; X86-NEXT: popl %esi
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; X86-NEXT: popl %edi
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; X86-NEXT: retl
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;
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; X64-LABEL: PR40483_sub3:
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; X64: # %bb.0:
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; X64-NEXT: movl (%rdi), %ecx
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; X64-NEXT: movl %ecx, %eax
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; X64-NEXT: subl %esi, %eax
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; X64-NEXT: movl %esi, %edx
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; X64-NEXT: subl %ecx, %edx
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; X64-NEXT: orl %eax, %edx
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: subl %esi, %ecx
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; X64-NEXT: movl %ecx, (%rdi)
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; X64-NEXT: cmovael %edx, %eax
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; X64-NEXT: retq
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%3 = load i32, i32* %0, align 8
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%4 = tail call { i8, i32 } @llvm.x86.subborrow.32(i8 0, i32 %3, i32 %1)
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%5 = extractvalue { i8, i32 } %4, 1
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store i32 %5, i32* %0, align 8
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%6 = extractvalue { i8, i32 } %4, 0
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%7 = icmp eq i8 %6, 0
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%8 = sub i32 %1, %3
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%9 = or i32 %5, %8
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%10 = select i1 %7, i32 %9, i32 0
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ret i32 %10
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}
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define i32 @PR40483_sub4(i32*, i32) nounwind {
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; X86-LABEL: PR40483_sub4:
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; X86: # %bb.0:
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; X86-NEXT: pushl %edi
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; X86-NEXT: pushl %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: movl (%esi), %edi
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; X86-NEXT: movl %edi, %ecx
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; X86-NEXT: subl %edx, %ecx
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: subl %edx, %edi
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; X86-NEXT: movl %edi, (%esi)
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; X86-NEXT: jae .LBB6_2
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; X86-NEXT: # %bb.1:
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; X86-NEXT: orl %ecx, %ecx
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: .LBB6_2:
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; X86-NEXT: popl %esi
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; X86-NEXT: popl %edi
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; X86-NEXT: retl
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;
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; X64-LABEL: PR40483_sub4:
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; X64: # %bb.0:
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; X64-NEXT: movl (%rdi), %ecx
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; X64-NEXT: movl %ecx, %edx
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; X64-NEXT: subl %esi, %edx
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; X64-NEXT: orl %edx, %edx
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: subl %esi, %ecx
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; X64-NEXT: movl %ecx, (%rdi)
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; X64-NEXT: cmovbl %edx, %eax
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; X64-NEXT: retq
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%3 = load i32, i32* %0, align 8
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%4 = tail call { i8, i32 } @llvm.x86.subborrow.32(i8 0, i32 %3, i32 %1)
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%5 = extractvalue { i8, i32 } %4, 1
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store i32 %5, i32* %0, align 8
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%6 = extractvalue { i8, i32 } %4, 0
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%7 = icmp eq i8 %6, 0
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%8 = sub i32 %3, %1
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%9 = or i32 %5, %8
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%10 = select i1 %7, i32 0, i32 %9
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ret i32 %10
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}
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declare { i8, i32 } @llvm.x86.subborrow.32(i8, i32, i32)
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