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Don't use getNextOperandForReg().
This way of using getNextOperandForReg() was unlikely to work as intended. We don't give any guarantees about the order of operands in the use-def chains, so looking only at operands following a given operand in the chain doesn't make sense. llvm-svn: 161542
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@ -328,7 +328,10 @@ CountValue *HexagonHardwareLoops::getTripCount(MachineLoop *L) const {
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// can get a useful trip count. The trip count can
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// be either a register or an immediate. The location
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// of the value depends upon the type (reg or imm).
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while ((IV_Opnd = IV_Opnd->getNextOperandForReg())) {
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for (MachineRegisterInfo::reg_iterator
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RI = MRI->reg_begin(IV_Opnd->getReg()), RE = MRI->reg_end();
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RI != RE; ++RI) {
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IV_Opnd = &RI.getOperand();
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const MachineInstr *MI = IV_Opnd->getParent();
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if (L->contains(MI) && isCompareEqualsImm(MI)) {
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const MachineOperand &MO = MI->getOperand(2);
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@ -337,7 +337,10 @@ CountValue *PPCCTRLoops::getTripCount(MachineLoop *L,
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// can get a useful trip count. The trip count can
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// be either a register or an immediate. The location
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// of the value depends upon the type (reg or imm).
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while ((IV_Opnd = IV_Opnd->getNextOperandForReg())) {
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for (MachineRegisterInfo::reg_iterator
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RI = MRI->reg_begin(IV_Opnd->getReg()), RE = MRI->reg_end();
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RI != RE; ++RI) {
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IV_Opnd = &RI.getOperand();
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bool SignedCmp;
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MachineInstr *MI = IV_Opnd->getParent();
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if (L->contains(MI) && isCompareEqualsImm(MI, SignedCmp) &&
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