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[ms-inline asm] Add support for creating AsmRewrites in the target specific

AsmParser logic.  To be used/tested in a subsequent commit.

llvm-svn: 166714
This commit is contained in:
Chad Rosier 2012-10-25 20:41:34 +00:00
parent 839f6c1a88
commit 749087c4ca
7 changed files with 61 additions and 36 deletions

View File

@ -21,6 +21,39 @@ class MCParsedAsmOperand;
class MCInst;
template <typename T> class SmallVectorImpl;
namespace {
enum AsmRewriteKind {
AOK_Imm,
AOK_Input,
AOK_Output,
AOK_SizeDirective,
AOK_Emit,
AOK_Skip,
AOK_DotOperator
};
struct AsmRewrite {
AsmRewriteKind Kind;
SMLoc Loc;
unsigned Len;
unsigned Val;
public:
AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len, unsigned val = 0)
: Kind(kind), Loc(loc), Len(len), Val(val) {}
};
}
struct ParseInstructionInfo {
SmallVectorImpl<AsmRewrite> *AsmRewrites;
ParseInstructionInfo() : AsmRewrites(0) {}
ParseInstructionInfo(SmallVectorImpl<AsmRewrite> *rewrites)
: AsmRewrites(rewrites) {}
~ParseInstructionInfo() {}
};
/// MCTargetAsmParser - Generic interface to target specific assembly parsers.
class MCTargetAsmParser : public MCAsmParserExtension {
public:
@ -77,7 +110,8 @@ public:
/// \param Operands [out] - The list of parsed operands, this returns
/// ownership of them to the caller.
/// \return True on failure.
virtual bool ParseInstruction(StringRef Name, SMLoc NameLoc,
virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
SMLoc NameLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands) = 0;
/// ParseDirective - Parse a target specific assembler directive

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@ -366,8 +366,9 @@ int EDDisassembler::parseInst(SmallVectorImpl<MCParsedAsmOperand*> &operands,
instName = OpcodeToken.getString();
instLoc = OpcodeToken.getLoc();
ParseInstructionInfo Info;
if (NextToken.isNot(AsmToken::Eof) &&
TargetParser->ParseInstruction(instName, instLoc, operands))
TargetParser->ParseInstruction(Info, instName, instLoc, operands))
ret = -1;
} else {
ret = -1;

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@ -86,7 +86,7 @@ public:
MemoryBuffer *I);
};
struct AsmRewrite;
//struct AsmRewrite;
struct ParseStatementInfo {
/// ParsedOperands - The parsed operands from the last parsed statement.
SmallVector<MCParsedAsmOperand*, 8> ParsedOperands;
@ -1365,8 +1365,9 @@ bool AsmParser::ParseStatement(ParseStatementInfo &Info) {
for (unsigned i = 0, e = IDVal.size(); i != e; ++i)
OpcodeStr.push_back(tolower(IDVal[i]));
bool HadError = getTargetParser().ParseInstruction(OpcodeStr.str(), IDLoc,
Info.ParsedOperands);
ParseInstructionInfo IInfo(Info.AsmRewrites);
bool HadError = getTargetParser().ParseInstruction(IInfo, OpcodeStr.str(),
IDLoc,Info.ParsedOperands);
// Dump the parsed representation, if requested.
if (getShowParsedOperands()) {
@ -3583,27 +3584,6 @@ bool AsmParser::ParseDirectiveEndr(SMLoc DirectiveLoc) {
return false;
}
namespace {
enum AsmRewriteKind {
AOK_Imm,
AOK_Input,
AOK_Output,
AOK_SizeDirective,
AOK_Emit,
AOK_Skip
};
struct AsmRewrite {
AsmRewriteKind Kind;
SMLoc Loc;
unsigned Len;
unsigned Size;
public:
AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len, unsigned size = 0)
: Kind(kind), Loc(loc), Len(len), Size(size) { }
};
}
bool AsmParser::ParseDirectiveEmit(SMLoc IDLoc, ParseStatementInfo &Info) {
const MCExpr *Value;
SMLoc ExprLoc = getLexer().getLoc();
@ -3780,7 +3760,7 @@ bool AsmParser::ParseMSInlineAsm(void *AsmLoc, std::string &AsmString,
OS << OutputIdx++;
break;
case AOK_SizeDirective:
switch((*I).Size) {
switch((*I).Val) {
default: break;
case 8: OS << "byte ptr "; break;
case 16: OS << "word ptr "; break;
@ -3794,6 +3774,9 @@ bool AsmParser::ParseMSInlineAsm(void *AsmLoc, std::string &AsmString,
case AOK_Emit:
OS << ".byte";
break;
case AOK_DotOperator:
OS << (*I).Val;
break;
}
// Skip the original expression.

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@ -253,7 +253,8 @@ public:
// Implementation of the MCTargetAsmParser interface:
bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
bool ParseInstruction(StringRef Name, SMLoc NameLoc,
bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
SMLoc NameLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands);
bool ParseDirective(AsmToken DirectiveID);
@ -4954,7 +4955,8 @@ static bool doesIgnoreDataTypeSuffix(StringRef Mnemonic, StringRef DT) {
static void applyMnemonicAliases(StringRef &Mnemonic, unsigned Features);
/// Parse an arm instruction mnemonic followed by its operands.
bool ARMAsmParser::ParseInstruction(StringRef Name, SMLoc NameLoc,
bool ARMAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
SMLoc NameLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
// Apply mnemonic aliases before doing anything else, as the destination
// mnemnonic may include suffices and we want to handle them normally.

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@ -61,7 +61,8 @@ public:
MBlazeAsmParser(MCSubtargetInfo &_STI, MCAsmParser &_Parser)
: MCTargetAsmParser(), Parser(_Parser) {}
virtual bool ParseInstruction(StringRef Name, SMLoc NameLoc,
virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
SMLoc NameLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands);
virtual bool ParseDirective(AsmToken DirectiveID);
@ -477,7 +478,7 @@ ParseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
/// Parse an mblaze instruction mnemonic followed by its operands.
bool MBlazeAsmParser::
ParseInstruction(StringRef Name, SMLoc NameLoc,
ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
// The first operands is the token for the instruction name
size_t dotLoc = Name.find('.');

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@ -74,7 +74,8 @@ class MipsAsmParser : public MCTargetAsmParser {
bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
bool ParseInstruction(StringRef Name, SMLoc NameLoc,
bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
SMLoc NameLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands);
bool parseMathOperation(StringRef Name, SMLoc NameLoc,
@ -1056,7 +1057,7 @@ parseMathOperation(StringRef Name, SMLoc NameLoc,
}
bool MipsAsmParser::
ParseInstruction(StringRef Name, SMLoc NameLoc,
ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
// floating point instructions: should register be treated as double?
if (requestsDoubleOperand(Name)) {

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@ -35,6 +35,7 @@ struct X86Operand;
class X86AsmParser : public MCTargetAsmParser {
MCSubtargetInfo &STI;
MCAsmParser &Parser;
ParseInstructionInfo *InstInfo;
private:
MCAsmParser &getParser() const { return Parser; }
@ -101,14 +102,15 @@ private:
public:
X86AsmParser(MCSubtargetInfo &sti, MCAsmParser &parser)
: MCTargetAsmParser(), STI(sti), Parser(parser) {
: MCTargetAsmParser(), STI(sti), Parser(parser), InstInfo(0) {
// Initialize the set of available features.
setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));
}
virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
virtual bool ParseInstruction(StringRef Name, SMLoc NameLoc,
virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
SMLoc NameLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands);
virtual bool ParseDirective(AsmToken DirectiveID);
@ -1106,8 +1108,9 @@ X86Operand *X86AsmParser::ParseMemOperand(unsigned SegReg, SMLoc MemStart) {
}
bool X86AsmParser::
ParseInstruction(StringRef Name, SMLoc NameLoc,
ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
InstInfo = &Info;
StringRef PatchedName = Name;
// FIXME: Hack to recognize setneb as setne.