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R600/SI: Implement sint<->fp64 conversions
llvm-svn: 187987
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@ -184,6 +184,12 @@ multiclass VOP1_32 <bits<8> op, string opName, list<dag> pattern>
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multiclass VOP1_64 <bits<8> op, string opName, list<dag> pattern>
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: VOP1_Helper <op, VReg_64, VSrc_64, opName, pattern>;
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multiclass VOP1_32_64 <bits<8> op, string opName, list<dag> pattern>
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: VOP1_Helper <op, VReg_32, VSrc_64, opName, pattern>;
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multiclass VOP1_64_32 <bits<8> op, string opName, list<dag> pattern>
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: VOP1_Helper <op, VReg_64, VSrc_32, opName, pattern>;
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multiclass VOP2_Helper <bits<6> op, RegisterClass vrc, RegisterClass arc,
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string opName, list<dag> pattern, string revOp> {
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def _e32 : VOP2 <
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@ -603,8 +603,12 @@ defm V_MOV_B32 : VOP1_32 <0x00000001, "V_MOV_B32", []>;
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} // End neverHasSideEffects = 1, isMoveImm = 1
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defm V_READFIRSTLANE_B32 : VOP1_32 <0x00000002, "V_READFIRSTLANE_B32", []>;
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//defm V_CVT_I32_F64 : VOP1_32 <0x00000003, "V_CVT_I32_F64", []>;
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//defm V_CVT_F64_I32 : VOP1_64 <0x00000004, "V_CVT_F64_I32", []>;
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defm V_CVT_I32_F64 : VOP1_32_64 <0x00000003, "V_CVT_I32_F64",
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[(set i32:$dst, (fp_to_sint f64:$src0))]
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>;
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defm V_CVT_F64_I32 : VOP1_64_32 <0x00000004, "V_CVT_F64_I32",
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[(set f64:$dst, (sint_to_fp i32:$src0))]
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>;
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defm V_CVT_F32_I32 : VOP1_32 <0x00000005, "V_CVT_F32_I32",
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[(set f32:$dst, (sint_to_fp i32:$src0))]
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>;
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9
test/CodeGen/R600/fp64_to_sint.ll
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9
test/CodeGen/R600/fp64_to_sint.ll
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@ -0,0 +1,9 @@
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; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s --check-prefix=CHECK
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; CHECK: @fp64_to_sint
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; CHECK: V_CVT_I32_F64_e32
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define void @fp64_to_sint(i32 addrspace(1)* %out, double %in) {
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%result = fptosi double %in to i32
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store i32 %result, i32 addrspace(1)* %out
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ret void
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}
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9
test/CodeGen/R600/sint_to_fp64.ll
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9
test/CodeGen/R600/sint_to_fp64.ll
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@ -0,0 +1,9 @@
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; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s --check-prefix=CHECK
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; CHECK: @sint_to_fp64
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; CHECK: V_CVT_F64_I32_e32
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define void @sint_to_fp64(double addrspace(1)* %out, i32 %in) {
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%result = sitofp i32 %in to double
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store double %result, double addrspace(1)* %out
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ret void
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}
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