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R600: Fix nonsensical implementation of computeKnownBits for BFE
This was resulting in invalid simplifications of sdiv llvm-svn: 219953
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@ -2377,11 +2377,7 @@ void AMDGPUTargetLowering::computeKnownBitsForTargetNode(
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unsigned BitWidth = 32;
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uint32_t Width = CWidth->getZExtValue() & 0x1f;
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// FIXME: This could do a lot more. If offset is 0, should be the same as
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// sign_extend_inreg implementation, but that involves duplicating it.
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if (Opc == AMDGPUISD::BFE_I32)
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KnownOne = APInt::getHighBitsSet(BitWidth, BitWidth - Width);
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else
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if (Opc == AMDGPUISD::BFE_U32)
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KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - Width);
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break;
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@ -424,3 +424,18 @@ define void @bfe_sext_in_reg_i24(i32 addrspace(1)* %out, i32 addrspace(1)* %in)
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store i32 %ashr, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @simplify_demanded_bfe_sdiv
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; SI: BUFFER_LOAD_DWORD [[LOAD:v[0-9]+]]
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; SI: V_BFE_I32 [[BFE:v[0-9]+]], [[LOAD]], 1, 16
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; SI: V_LSHRREV_B32_e32 [[TMP0:v[0-9]+]], 31, [[BFE]]
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; SI: V_ADD_I32_e32 [[TMP1:v[0-9]+]], [[TMP0]], [[BFE]]
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; SI: V_ASHRREV_I32_e32 [[TMP2:v[0-9]+]], 1, [[TMP1]]
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; SI: BUFFER_STORE_DWORD [[TMP2]]
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define void @simplify_demanded_bfe_sdiv(i32 addrspace(1)* %out, i32 addrspace(1)* %in) nounwind {
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%src = load i32 addrspace(1)* %in, align 4
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%bfe = call i32 @llvm.AMDGPU.bfe.i32(i32 %src, i32 1, i32 16) nounwind readnone
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%div = sdiv i32 %bfe, 2
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store i32 %div, i32 addrspace(1)* %out, align 4
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ret void
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}
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