diff --git a/include/llvm/Transforms/IPO/Attributor.h b/include/llvm/Transforms/IPO/Attributor.h index d09b842ec8e..c9a242803d7 100644 --- a/include/llvm/Transforms/IPO/Attributor.h +++ b/include/llvm/Transforms/IPO/Attributor.h @@ -4483,6 +4483,7 @@ struct AAPointerInfo : public AbstractAttribute { RemoteI = Other.RemoteI; Content = Other.Content; Kind = Other.Kind; + Ty = Other.Ty; return *this; } bool operator==(const Access &R) const { diff --git a/lib/Transforms/IPO/Attributor.cpp b/lib/Transforms/IPO/Attributor.cpp index a976032f925..d947df259f3 100644 --- a/lib/Transforms/IPO/Attributor.cpp +++ b/lib/Transforms/IPO/Attributor.cpp @@ -2729,7 +2729,9 @@ raw_ostream &llvm::operator<<(raw_ostream &OS, const AAPointerInfo::Access &Acc) { OS << " [" << Acc.getKind() << "] " << *Acc.getRemoteInst(); if (Acc.getLocalInst() != Acc.getRemoteInst()) - OS << " via " << *Acc.getLocalInst() << "\n"; + OS << " via " << *Acc.getLocalInst(); + if (Acc.getContent().hasValue()) + OS << " [" << *Acc.getContent() << "]"; return OS; } ///} diff --git a/test/Transforms/Attributor/ArgumentPromotion/2008-02-01-ReturnAttrs.ll b/test/Transforms/Attributor/ArgumentPromotion/2008-02-01-ReturnAttrs.ll index 54ce838c52b..6efe57c85ce 100644 --- a/test/Transforms/Attributor/ArgumentPromotion/2008-02-01-ReturnAttrs.ll +++ b/test/Transforms/Attributor/ArgumentPromotion/2008-02-01-ReturnAttrs.ll @@ -30,12 +30,12 @@ define internal i32 @deref(i32* %x) nounwind { ; ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@deref -; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] { +; IS__CGSCC_NPM-SAME: (i32 returned [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: [[X_PRIV:%.*]] = alloca i32, align 4 ; IS__CGSCC_NPM-NEXT: store i32 [[TMP0]], i32* [[X_PRIV]], align 4 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[X_PRIV]], align 4 -; IS__CGSCC_NPM-NEXT: ret i32 [[TMP2]] +; IS__CGSCC_NPM-NEXT: ret i32 [[TMP0]] ; entry: %tmp2 = load i32, i32* %x, align 4 @@ -73,12 +73,11 @@ define i32 @f(i32 %x) { ; ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f -; IS__CGSCC_NPM-SAME: (i32 [[X:%.*]]) #[[ATTR0]] { +; IS__CGSCC_NPM-SAME: (i32 returned [[X:%.*]]) #[[ATTR0]] { ; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 ; IS__CGSCC_NPM-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4 -; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = call i32 @deref(i32 [[X]]) #[[ATTR1:[0-9]+]] -; IS__CGSCC_NPM-NEXT: ret i32 [[TMP1]] +; IS__CGSCC_NPM-NEXT: ret i32 [[X]] ; entry: %x_addr = alloca i32 @@ -96,5 +95,4 @@ entry: ; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nounwind readonly willreturn } ;. ; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } -; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nounwind readnone willreturn } ;. diff --git a/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll b/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll index 8929378a9e4..62b35f4ce55 100644 --- a/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll +++ b/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll @@ -104,15 +104,25 @@ define internal fastcc void @promote_avx2(<4 x i64>* %arg, <4 x i64>* readonly % ; IS________OPM-NEXT: store <4 x i64> [[TMP]], <4 x i64>* [[ARG]], align 32 ; IS________OPM-NEXT: ret void ; -; IS________NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn -; IS________NPM-LABEL: define {{[^@]+}}@promote_avx2 -; IS________NPM-SAME: (<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[ARG:%.*]], <4 x i64> [[TMP0:%.*]]) #[[ATTR0]] { -; IS________NPM-NEXT: bb: -; IS________NPM-NEXT: [[ARG1_PRIV:%.*]] = alloca <4 x i64>, align 32 -; IS________NPM-NEXT: store <4 x i64> [[TMP0]], <4 x i64>* [[ARG1_PRIV]], align 32 -; IS________NPM-NEXT: [[TMP:%.*]] = load <4 x i64>, <4 x i64>* [[ARG1_PRIV]], align 32 -; IS________NPM-NEXT: store <4 x i64> [[TMP]], <4 x i64>* [[ARG]], align 32 -; IS________NPM-NEXT: ret void +; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn +; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@promote_avx2 +; IS__TUNIT_NPM-SAME: (<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[ARG:%.*]], <4 x i64> [[TMP0:%.*]]) #[[ATTR0]] { +; IS__TUNIT_NPM-NEXT: bb: +; IS__TUNIT_NPM-NEXT: [[ARG1_PRIV:%.*]] = alloca <4 x i64>, align 32 +; IS__TUNIT_NPM-NEXT: store <4 x i64> [[TMP0]], <4 x i64>* [[ARG1_PRIV]], align 32 +; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = load <4 x i64>, <4 x i64>* [[ARG1_PRIV]], align 32 +; IS__TUNIT_NPM-NEXT: store <4 x i64> [[TMP]], <4 x i64>* [[ARG]], align 32 +; IS__TUNIT_NPM-NEXT: ret void +; +; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn +; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@promote_avx2 +; IS__CGSCC_NPM-SAME: (<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[ARG:%.*]], <4 x i64> [[TMP0:%.*]]) #[[ATTR0]] { +; IS__CGSCC_NPM-NEXT: bb: +; IS__CGSCC_NPM-NEXT: [[ARG1_PRIV:%.*]] = alloca <4 x i64>, align 32 +; IS__CGSCC_NPM-NEXT: store <4 x i64> [[TMP0]], <4 x i64>* [[ARG1_PRIV]], align 32 +; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = load <4 x i64>, <4 x i64>* [[ARG1_PRIV]], align 32 +; IS__CGSCC_NPM-NEXT: store <4 x i64> [[TMP0]], <4 x i64>* [[ARG]], align 32 +; IS__CGSCC_NPM-NEXT: ret void ; bb: %tmp = load <4 x i64>, <4 x i64>* %arg1 diff --git a/test/Transforms/Attributor/ArgumentPromotion/X86/min-legal-vector-width.ll b/test/Transforms/Attributor/ArgumentPromotion/X86/min-legal-vector-width.ll index 10b09471d8c..eb433921a94 100644 --- a/test/Transforms/Attributor/ArgumentPromotion/X86/min-legal-vector-width.ll +++ b/test/Transforms/Attributor/ArgumentPromotion/X86/min-legal-vector-width.ll @@ -19,15 +19,25 @@ define internal fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal5 ; IS________OPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 ; IS________OPM-NEXT: ret void ; -; IS________NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn -; IS________NPM-LABEL: define {{[^@]+}}@callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512 -; IS________NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64> [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] { -; IS________NPM-NEXT: bb: -; IS________NPM-NEXT: [[ARG1_PRIV:%.*]] = alloca <8 x i64>, align 64 -; IS________NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG1_PRIV]], align 64 -; IS________NPM-NEXT: [[TMP:%.*]] = load <8 x i64>, <8 x i64>* [[ARG1_PRIV]], align 64 -; IS________NPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 -; IS________NPM-NEXT: ret void +; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn +; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512 +; IS__TUNIT_NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64> [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] { +; IS__TUNIT_NPM-NEXT: bb: +; IS__TUNIT_NPM-NEXT: [[ARG1_PRIV:%.*]] = alloca <8 x i64>, align 64 +; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = load <8 x i64>, <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 +; IS__TUNIT_NPM-NEXT: ret void +; +; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn +; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512 +; IS__CGSCC_NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64> [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] { +; IS__CGSCC_NPM-NEXT: bb: +; IS__CGSCC_NPM-NEXT: [[ARG1_PRIV:%.*]] = alloca <8 x i64>, align 64 +; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = load <8 x i64>, <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG]], align 64 +; IS__CGSCC_NPM-NEXT: ret void ; bb: %tmp = load <8 x i64>, <8 x i64>* %arg1 @@ -113,15 +123,25 @@ define internal fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal5 ; IS________OPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 ; IS________OPM-NEXT: ret void ; -; IS________NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn -; IS________NPM-LABEL: define {{[^@]+}}@callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256 -; IS________NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64> [[TMP0:%.*]]) #[[ATTR1:[0-9]+]] { -; IS________NPM-NEXT: bb: -; IS________NPM-NEXT: [[ARG1_PRIV:%.*]] = alloca <8 x i64>, align 64 -; IS________NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG1_PRIV]], align 64 -; IS________NPM-NEXT: [[TMP:%.*]] = load <8 x i64>, <8 x i64>* [[ARG1_PRIV]], align 64 -; IS________NPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 -; IS________NPM-NEXT: ret void +; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn +; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256 +; IS__TUNIT_NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64> [[TMP0:%.*]]) #[[ATTR1:[0-9]+]] { +; IS__TUNIT_NPM-NEXT: bb: +; IS__TUNIT_NPM-NEXT: [[ARG1_PRIV:%.*]] = alloca <8 x i64>, align 64 +; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = load <8 x i64>, <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 +; IS__TUNIT_NPM-NEXT: ret void +; +; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn +; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256 +; IS__CGSCC_NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64> [[TMP0:%.*]]) #[[ATTR1:[0-9]+]] { +; IS__CGSCC_NPM-NEXT: bb: +; IS__CGSCC_NPM-NEXT: [[ARG1_PRIV:%.*]] = alloca <8 x i64>, align 64 +; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = load <8 x i64>, <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG]], align 64 +; IS__CGSCC_NPM-NEXT: ret void ; bb: %tmp = load <8 x i64>, <8 x i64>* %arg1 @@ -207,15 +227,25 @@ define internal fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal5 ; IS________OPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 ; IS________OPM-NEXT: ret void ; -; IS________NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn -; IS________NPM-LABEL: define {{[^@]+}}@callee_avx512_legal512_prefer512_call_avx512_legal512_prefer256 -; IS________NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64> [[TMP0:%.*]]) #[[ATTR1]] { -; IS________NPM-NEXT: bb: -; IS________NPM-NEXT: [[ARG1_PRIV:%.*]] = alloca <8 x i64>, align 64 -; IS________NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG1_PRIV]], align 64 -; IS________NPM-NEXT: [[TMP:%.*]] = load <8 x i64>, <8 x i64>* [[ARG1_PRIV]], align 64 -; IS________NPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 -; IS________NPM-NEXT: ret void +; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn +; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@callee_avx512_legal512_prefer512_call_avx512_legal512_prefer256 +; IS__TUNIT_NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64> [[TMP0:%.*]]) #[[ATTR1]] { +; IS__TUNIT_NPM-NEXT: bb: +; IS__TUNIT_NPM-NEXT: [[ARG1_PRIV:%.*]] = alloca <8 x i64>, align 64 +; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = load <8 x i64>, <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 +; IS__TUNIT_NPM-NEXT: ret void +; +; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn +; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@callee_avx512_legal512_prefer512_call_avx512_legal512_prefer256 +; IS__CGSCC_NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64> [[TMP0:%.*]]) #[[ATTR1]] { +; IS__CGSCC_NPM-NEXT: bb: +; IS__CGSCC_NPM-NEXT: [[ARG1_PRIV:%.*]] = alloca <8 x i64>, align 64 +; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = load <8 x i64>, <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG]], align 64 +; IS__CGSCC_NPM-NEXT: ret void ; bb: %tmp = load <8 x i64>, <8 x i64>* %arg1 @@ -301,15 +331,25 @@ define internal fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal5 ; IS________OPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 ; IS________OPM-NEXT: ret void ; -; IS________NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn -; IS________NPM-LABEL: define {{[^@]+}}@callee_avx512_legal512_prefer256_call_avx512_legal512_prefer512 -; IS________NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64> [[TMP0:%.*]]) #[[ATTR0]] { -; IS________NPM-NEXT: bb: -; IS________NPM-NEXT: [[ARG1_PRIV:%.*]] = alloca <8 x i64>, align 64 -; IS________NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG1_PRIV]], align 64 -; IS________NPM-NEXT: [[TMP:%.*]] = load <8 x i64>, <8 x i64>* [[ARG1_PRIV]], align 64 -; IS________NPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 -; IS________NPM-NEXT: ret void +; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn +; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@callee_avx512_legal512_prefer256_call_avx512_legal512_prefer512 +; IS__TUNIT_NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64> [[TMP0:%.*]]) #[[ATTR0]] { +; IS__TUNIT_NPM-NEXT: bb: +; IS__TUNIT_NPM-NEXT: [[ARG1_PRIV:%.*]] = alloca <8 x i64>, align 64 +; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = load <8 x i64>, <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 +; IS__TUNIT_NPM-NEXT: ret void +; +; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn +; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@callee_avx512_legal512_prefer256_call_avx512_legal512_prefer512 +; IS__CGSCC_NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64> [[TMP0:%.*]]) #[[ATTR0]] { +; IS__CGSCC_NPM-NEXT: bb: +; IS__CGSCC_NPM-NEXT: [[ARG1_PRIV:%.*]] = alloca <8 x i64>, align 64 +; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = load <8 x i64>, <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG]], align 64 +; IS__CGSCC_NPM-NEXT: ret void ; bb: %tmp = load <8 x i64>, <8 x i64>* %arg1 @@ -397,7 +437,7 @@ define internal fastcc void @callee_avx512_legal256_prefer256_call_avx512_legal5 ; ; IS________NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn ; IS________NPM-LABEL: define {{[^@]+}}@callee_avx512_legal256_prefer256_call_avx512_legal512_prefer256 -; IS________NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[ARG1:%.*]]) #[[ATTR1]] { +; IS________NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[ARG1:%.*]]) #[[ATTR1:[0-9]+]] { ; IS________NPM-NEXT: bb: ; IS________NPM-NEXT: [[TMP:%.*]] = load <8 x i64>, <8 x i64>* [[ARG1]], align 64 ; IS________NPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 @@ -575,15 +615,25 @@ define internal fastcc void @callee_avx2_legal256_prefer256_call_avx2_legal512_p ; IS________OPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 ; IS________OPM-NEXT: ret void ; -; IS________NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn -; IS________NPM-LABEL: define {{[^@]+}}@callee_avx2_legal256_prefer256_call_avx2_legal512_prefer256 -; IS________NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64> [[TMP0:%.*]]) #[[ATTR3:[0-9]+]] { -; IS________NPM-NEXT: bb: -; IS________NPM-NEXT: [[ARG1_PRIV:%.*]] = alloca <8 x i64>, align 64 -; IS________NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG1_PRIV]], align 64 -; IS________NPM-NEXT: [[TMP:%.*]] = load <8 x i64>, <8 x i64>* [[ARG1_PRIV]], align 64 -; IS________NPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 -; IS________NPM-NEXT: ret void +; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn +; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@callee_avx2_legal256_prefer256_call_avx2_legal512_prefer256 +; IS__TUNIT_NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64> [[TMP0:%.*]]) #[[ATTR3:[0-9]+]] { +; IS__TUNIT_NPM-NEXT: bb: +; IS__TUNIT_NPM-NEXT: [[ARG1_PRIV:%.*]] = alloca <8 x i64>, align 64 +; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = load <8 x i64>, <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 +; IS__TUNIT_NPM-NEXT: ret void +; +; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn +; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@callee_avx2_legal256_prefer256_call_avx2_legal512_prefer256 +; IS__CGSCC_NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64> [[TMP0:%.*]]) #[[ATTR3:[0-9]+]] { +; IS__CGSCC_NPM-NEXT: bb: +; IS__CGSCC_NPM-NEXT: [[ARG1_PRIV:%.*]] = alloca <8 x i64>, align 64 +; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = load <8 x i64>, <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG]], align 64 +; IS__CGSCC_NPM-NEXT: ret void ; bb: %tmp = load <8 x i64>, <8 x i64>* %arg1 @@ -669,15 +719,25 @@ define internal fastcc void @callee_avx2_legal512_prefer256_call_avx2_legal256_p ; IS________OPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 ; IS________OPM-NEXT: ret void ; -; IS________NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn -; IS________NPM-LABEL: define {{[^@]+}}@callee_avx2_legal512_prefer256_call_avx2_legal256_prefer256 -; IS________NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64> [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] { -; IS________NPM-NEXT: bb: -; IS________NPM-NEXT: [[ARG1_PRIV:%.*]] = alloca <8 x i64>, align 64 -; IS________NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG1_PRIV]], align 64 -; IS________NPM-NEXT: [[TMP:%.*]] = load <8 x i64>, <8 x i64>* [[ARG1_PRIV]], align 64 -; IS________NPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 -; IS________NPM-NEXT: ret void +; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn +; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@callee_avx2_legal512_prefer256_call_avx2_legal256_prefer256 +; IS__TUNIT_NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64> [[TMP0:%.*]]) #[[ATTR4]] { +; IS__TUNIT_NPM-NEXT: bb: +; IS__TUNIT_NPM-NEXT: [[ARG1_PRIV:%.*]] = alloca <8 x i64>, align 64 +; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = load <8 x i64>, <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 +; IS__TUNIT_NPM-NEXT: ret void +; +; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn +; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@callee_avx2_legal512_prefer256_call_avx2_legal256_prefer256 +; IS__CGSCC_NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64> [[TMP0:%.*]]) #[[ATTR4]] { +; IS__CGSCC_NPM-NEXT: bb: +; IS__CGSCC_NPM-NEXT: [[ARG1_PRIV:%.*]] = alloca <8 x i64>, align 64 +; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = load <8 x i64>, <8 x i64>* [[ARG1_PRIV]], align 64 +; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP0]], <8 x i64>* [[ARG]], align 64 +; IS__CGSCC_NPM-NEXT: ret void ; bb: %tmp = load <8 x i64>, <8 x i64>* %arg1 diff --git a/test/Transforms/Attributor/ArgumentPromotion/alignment.ll b/test/Transforms/Attributor/ArgumentPromotion/alignment.ll index 42c60a33c65..ec78e23d91e 100644 --- a/test/Transforms/Attributor/ArgumentPromotion/alignment.ll +++ b/test/Transforms/Attributor/ArgumentPromotion/alignment.ll @@ -47,9 +47,8 @@ define internal void @g(i32* %a) { ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@g ; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]]) { ; IS__CGSCC_NPM-NEXT: [[A_PRIV:%.*]] = alloca i32, align 4 -; IS__CGSCC_NPM-NEXT: store i32 undef, i32* [[A_PRIV]], align 4 ; IS__CGSCC_NPM-NEXT: [[AA:%.*]] = load i32, i32* [[A_PRIV]], align 4 -; IS__CGSCC_NPM-NEXT: call void @z(i32 [[AA]]) +; IS__CGSCC_NPM-NEXT: call void @z(i32 undef) ; IS__CGSCC_NPM-NEXT: ret void ; %aa = load i32, i32* %a, align 1 @@ -112,19 +111,18 @@ define internal i32 @test(i32* %X, i64* %Y) { ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test ; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]], i64 [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__CGSCC_NPM-NEXT: [[Y_PRIV:%.*]] = alloca i64, align 8 -; IS__CGSCC_NPM-NEXT: store i64 1, i64* [[Y_PRIV]], align 8 ; IS__CGSCC_NPM-NEXT: [[X_PRIV:%.*]] = alloca i32, align 4 -; IS__CGSCC_NPM-NEXT: store i32 [[TMP0]], i32* [[X_PRIV]], align 4 +; IS__CGSCC_NPM-NEXT: store i32 2, i32* [[X_PRIV]], align 4 ; IS__CGSCC_NPM-NEXT: [[A:%.*]] = load i32, i32* [[X_PRIV]], align 4 ; IS__CGSCC_NPM-NEXT: [[B:%.*]] = load i64, i64* [[Y_PRIV]], align 8 -; IS__CGSCC_NPM-NEXT: [[C:%.*]] = add i32 [[TMP0]], 1 -; IS__CGSCC_NPM-NEXT: [[D:%.*]] = add i64 [[B]], 1 -; IS__CGSCC_NPM-NEXT: [[COND:%.*]] = icmp sgt i64 [[D]], -1 -; IS__CGSCC_NPM-NEXT: br i1 [[COND]], label [[RETURN1:%.*]], label [[RETURN2:%.*]] +; IS__CGSCC_NPM-NEXT: [[C:%.*]] = add i32 2, 1 +; IS__CGSCC_NPM-NEXT: [[D:%.*]] = add i64 1, 1 +; IS__CGSCC_NPM-NEXT: [[COND:%.*]] = icmp sgt i64 2, -1 +; IS__CGSCC_NPM-NEXT: br i1 true, label [[RETURN1:%.*]], label [[RETURN2:%.*]] ; IS__CGSCC_NPM: Return1: -; IS__CGSCC_NPM-NEXT: ret i32 [[C]] +; IS__CGSCC_NPM-NEXT: ret i32 3 ; IS__CGSCC_NPM: Return2: -; IS__CGSCC_NPM-NEXT: ret i32 [[TMP0]] +; IS__CGSCC_NPM-NEXT: ret i32 2 ; %A = load i32, i32* %X %B = load i64, i64* %Y @@ -171,9 +169,8 @@ define internal i32 @caller(i32* %A) { ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@caller ; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]]) #[[ATTR0]] { ; IS__CGSCC_NPM-NEXT: [[A_PRIV:%.*]] = alloca i32, align 4 -; IS__CGSCC_NPM-NEXT: store i32 2, i32* [[A_PRIV]], align 4 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_PRIV]], align 4 -; IS__CGSCC_NPM-NEXT: [[C:%.*]] = call i32 @test(i32 [[TMP2]], i64 undef) #[[ATTR1:[0-9]+]] +; IS__CGSCC_NPM-NEXT: [[C:%.*]] = call i32 @test(i32 undef, i64 undef) #[[ATTR1:[0-9]+]], !range [[RNG0:![0-9]+]] ; IS__CGSCC_NPM-NEXT: ret i32 [[C]] ; %B = alloca i64 @@ -236,3 +233,5 @@ define i32 @callercaller() { ; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR2]] = { nounwind readnone willreturn } ;. +; IS__CGSCC_NPM: [[RNG0]] = !{i32 0, i32 4} +;. diff --git a/test/Transforms/Attributor/ArgumentPromotion/basictest.ll b/test/Transforms/Attributor/ArgumentPromotion/basictest.ll index 4dad2a8dc09..f923d887c22 100644 --- a/test/Transforms/Attributor/ArgumentPromotion/basictest.ll +++ b/test/Transforms/Attributor/ArgumentPromotion/basictest.ll @@ -38,13 +38,12 @@ define internal i32 @test(i32* %X, i32* %Y) { ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test ; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__CGSCC_NPM-NEXT: [[Y_PRIV:%.*]] = alloca i32, align 4 -; IS__CGSCC_NPM-NEXT: store i32 [[TMP1]], i32* [[Y_PRIV]], align 4 +; IS__CGSCC_NPM-NEXT: store i32 2, i32* [[Y_PRIV]], align 4 ; IS__CGSCC_NPM-NEXT: [[X_PRIV:%.*]] = alloca i32, align 4 -; IS__CGSCC_NPM-NEXT: store i32 1, i32* [[X_PRIV]], align 4 ; IS__CGSCC_NPM-NEXT: [[A:%.*]] = load i32, i32* [[X_PRIV]], align 4 ; IS__CGSCC_NPM-NEXT: [[B:%.*]] = load i32, i32* [[Y_PRIV]], align 4 -; IS__CGSCC_NPM-NEXT: [[C:%.*]] = add i32 1, [[TMP1]] -; IS__CGSCC_NPM-NEXT: ret i32 [[C]] +; IS__CGSCC_NPM-NEXT: [[C:%.*]] = add i32 1, 2 +; IS__CGSCC_NPM-NEXT: ret i32 3 ; %A = load i32, i32* %X %B = load i32, i32* %Y @@ -85,10 +84,9 @@ define internal i32 @caller(i32* %B) { ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@caller ; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]]) #[[ATTR0]] { ; IS__CGSCC_NPM-NEXT: [[B_PRIV:%.*]] = alloca i32, align 4 -; IS__CGSCC_NPM-NEXT: store i32 2, i32* [[B_PRIV]], align 4 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[B_PRIV]], align 4 -; IS__CGSCC_NPM-NEXT: [[C:%.*]] = call i32 @test(i32 undef, i32 [[TMP2]]) #[[ATTR1:[0-9]+]] -; IS__CGSCC_NPM-NEXT: ret i32 [[C]] +; IS__CGSCC_NPM-NEXT: [[C:%.*]] = call i32 @test(i32 undef, i32 undef) #[[ATTR1:[0-9]+]] +; IS__CGSCC_NPM-NEXT: ret i32 undef ; %A = alloca i32 store i32 1, i32* %A @@ -125,8 +123,7 @@ define i32 @callercaller() { ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@callercaller ; IS__CGSCC_NPM-SAME: () #[[ATTR0]] { -; IS__CGSCC_NPM-NEXT: [[X:%.*]] = call i32 @caller(i32 undef) #[[ATTR2:[0-9]+]] -; IS__CGSCC_NPM-NEXT: ret i32 [[X]] +; IS__CGSCC_NPM-NEXT: ret i32 3 ; %B = alloca i32 store i32 2, i32* %B @@ -149,5 +146,4 @@ define i32 @callercaller() { ;. ; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nosync nounwind readnone willreturn } -; IS__CGSCC_NPM: attributes #[[ATTR2]] = { nounwind readnone willreturn } ;. diff --git a/test/Transforms/Attributor/ArgumentPromotion/control-flow2.ll b/test/Transforms/Attributor/ArgumentPromotion/control-flow2.ll index d4da7700552..28f4e961826 100644 --- a/test/Transforms/Attributor/ArgumentPromotion/control-flow2.ll +++ b/test/Transforms/Attributor/ArgumentPromotion/control-flow2.ll @@ -43,13 +43,12 @@ define internal i32 @callee(i1 %C, i32* %P) { ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@callee ; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__CGSCC_NPM-NEXT: [[P_PRIV:%.*]] = alloca i32, align 4 -; IS__CGSCC_NPM-NEXT: store i32 17, i32* [[P_PRIV]], align 4 ; IS__CGSCC_NPM-NEXT: br label [[F:%.*]] ; IS__CGSCC_NPM: T: ; IS__CGSCC_NPM-NEXT: unreachable ; IS__CGSCC_NPM: F: ; IS__CGSCC_NPM-NEXT: [[X:%.*]] = load i32, i32* [[P_PRIV]], align 4 -; IS__CGSCC_NPM-NEXT: ret i32 [[X]] +; IS__CGSCC_NPM-NEXT: ret i32 undef ; br i1 %C, label %T, label %F @@ -90,8 +89,7 @@ define i32 @foo() { ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@foo ; IS__CGSCC_NPM-SAME: () #[[ATTR0]] { -; IS__CGSCC_NPM-NEXT: [[X:%.*]] = call i32 @callee(i32 undef) #[[ATTR1:[0-9]+]] -; IS__CGSCC_NPM-NEXT: ret i32 [[X]] +; IS__CGSCC_NPM-NEXT: ret i32 17 ; %A = alloca i32 ; [#uses=2] store i32 17, i32* %A @@ -109,5 +107,4 @@ define i32 @foo() { ; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nounwind readonly willreturn } ;. ; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } -; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nounwind readnone willreturn } ;. diff --git a/test/Transforms/Attributor/ArgumentPromotion/profile.ll b/test/Transforms/Attributor/ArgumentPromotion/profile.ll index 6a692f4b1e8..b46f981bfa8 100644 --- a/test/Transforms/Attributor/ArgumentPromotion/profile.ll +++ b/test/Transforms/Attributor/ArgumentPromotion/profile.ll @@ -49,9 +49,8 @@ define internal void @promote_i32_ptr(i32* %xp) { ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@promote_i32_ptr ; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]]) { ; IS__CGSCC_NPM-NEXT: [[XP_PRIV:%.*]] = alloca i32, align 4 -; IS__CGSCC_NPM-NEXT: store i32 42, i32* [[XP_PRIV]], align 4 ; IS__CGSCC_NPM-NEXT: [[X:%.*]] = load i32, i32* [[XP_PRIV]], align 4 -; IS__CGSCC_NPM-NEXT: call void @use_i32(i32 [[X]]) +; IS__CGSCC_NPM-NEXT: call void @use_i32(i32 42) ; IS__CGSCC_NPM-NEXT: ret void ; %x = load i32, i32* %xp diff --git a/test/Transforms/Attributor/IPConstantProp/2009-09-24-byval-ptr.ll b/test/Transforms/Attributor/IPConstantProp/2009-09-24-byval-ptr.ll index e52954c6ed7..6b87aebef4b 100644 --- a/test/Transforms/Attributor/IPConstantProp/2009-09-24-byval-ptr.ll +++ b/test/Transforms/Attributor/IPConstantProp/2009-09-24-byval-ptr.ll @@ -132,8 +132,8 @@ define internal i32 @vfu2(%struct.MYstr* byval(%struct.MYstr) align 4 %u) nounwi ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 0 ; IS__CGSCC_NPM-NEXT: [[TMP5:%.*]] = load i8, i8* [[TMP4]], align 8 -; IS__CGSCC_NPM-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i32 -; IS__CGSCC_NPM-NEXT: [[TMP7:%.*]] = add i32 [[TMP6]], [[TMP3]] +; IS__CGSCC_NPM-NEXT: [[TMP6:%.*]] = zext i8 [[TMP0]] to i32 +; IS__CGSCC_NPM-NEXT: [[TMP7:%.*]] = add i32 [[TMP6]], [[TMP1]] ; IS__CGSCC_NPM-NEXT: ret i32 [[TMP7]] ; entry: @@ -260,8 +260,8 @@ define internal i32 @vfu2_v2(%struct.MYstr* byval(%struct.MYstr) align 4 %u) nou ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 0 ; IS__CGSCC_NPM-NEXT: [[TMP5:%.*]] = load i8, i8* [[TMP4]], align 8 -; IS__CGSCC_NPM-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i32 -; IS__CGSCC_NPM-NEXT: [[TMP7:%.*]] = add i32 [[TMP6]], [[TMP3]] +; IS__CGSCC_NPM-NEXT: [[TMP6:%.*]] = zext i8 0 to i32 +; IS__CGSCC_NPM-NEXT: [[TMP7:%.*]] = add i32 0, [[TMP3]] ; IS__CGSCC_NPM-NEXT: ret i32 [[TMP7]] ; entry: @@ -289,15 +289,15 @@ define i32 @unions_v2() nounwind { ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@unions_v2 ; IS__TUNIT_NPM-SAME: () #[[ATTR0]] { ; IS__TUNIT_NPM-NEXT: entry: -; IS__TUNIT_NPM-NEXT: [[MYSTR_CAST1:%.*]] = bitcast %struct.MYstr* @mystr to i8* -; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i8, i8* [[MYSTR_CAST1]], align 8 -; IS__TUNIT_NPM-NEXT: [[MYSTR_0_12:%.*]] = getelementptr [[STRUCT_MYSTR:%.*]], %struct.MYstr* @mystr, i32 0, i32 1 -; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[MYSTR_0_12]], align 8 -; IS__TUNIT_NPM-NEXT: call void @vfu1(i8 [[TMP0]], i32 [[TMP1]]) #[[ATTR0]] ; IS__TUNIT_NPM-NEXT: [[MYSTR_CAST:%.*]] = bitcast %struct.MYstr* @mystr to i8* -; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i8, i8* [[MYSTR_CAST]], align 8 -; IS__TUNIT_NPM-NEXT: [[MYSTR_0_1:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* @mystr, i32 0, i32 1 -; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[MYSTR_0_1]], align 8 +; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i8, i8* [[MYSTR_CAST]], align 8 +; IS__TUNIT_NPM-NEXT: [[MYSTR_0_1:%.*]] = getelementptr [[STRUCT_MYSTR:%.*]], %struct.MYstr* @mystr, i32 0, i32 1 +; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[MYSTR_0_1]], align 8 +; IS__TUNIT_NPM-NEXT: call void @vfu1(i8 [[TMP0]], i32 [[TMP1]]) #[[ATTR0]] +; IS__TUNIT_NPM-NEXT: [[MYSTR_CAST1:%.*]] = bitcast %struct.MYstr* @mystr to i8* +; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i8, i8* [[MYSTR_CAST1]], align 8 +; IS__TUNIT_NPM-NEXT: [[MYSTR_0_12:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* @mystr, i32 0, i32 1 +; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[MYSTR_0_12]], align 8 ; IS__TUNIT_NPM-NEXT: [[RESULT:%.*]] = call i32 @vfu2_v2(i8 [[TMP2]], i32 [[TMP3]]) #[[ATTR2]] ; IS__TUNIT_NPM-NEXT: ret i32 [[RESULT]] ; diff --git a/test/Transforms/Attributor/internal-noalias.ll b/test/Transforms/Attributor/internal-noalias.ll index 70f14b2682c..62e320699bd 100644 --- a/test/Transforms/Attributor/internal-noalias.ll +++ b/test/Transforms/Attributor/internal-noalias.ll @@ -185,13 +185,11 @@ define internal i32 @noalias_args_argmem_ro(i32* %A, i32* %B) #1 { ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@noalias_args_argmem_ro ; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR2:[0-9]+]] { ; IS__CGSCC_NPM-NEXT: [[B_PRIV:%.*]] = alloca i32, align 4 -; IS__CGSCC_NPM-NEXT: store i32 5, i32* [[B_PRIV]], align 4 ; IS__CGSCC_NPM-NEXT: [[A_PRIV:%.*]] = alloca i32, align 4 -; IS__CGSCC_NPM-NEXT: store i32 5, i32* [[A_PRIV]], align 4 ; IS__CGSCC_NPM-NEXT: [[T0:%.*]] = load i32, i32* [[A_PRIV]], align 4 ; IS__CGSCC_NPM-NEXT: [[T1:%.*]] = load i32, i32* [[B_PRIV]], align 4 -; IS__CGSCC_NPM-NEXT: [[ADD:%.*]] = add nsw i32 [[T0]], [[T1]] -; IS__CGSCC_NPM-NEXT: ret i32 [[ADD]] +; IS__CGSCC_NPM-NEXT: [[ADD:%.*]] = add nsw i32 5, 5 +; IS__CGSCC_NPM-NEXT: ret i32 undef ; %t0 = load i32, i32* %A, align 4 %t1 = load i32, i32* %B, align 4 @@ -229,8 +227,7 @@ define i32 @visible_local_2() { ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@visible_local_2 ; IS__CGSCC_NPM-SAME: () #[[ATTR3:[0-9]+]] { -; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32 @noalias_args_argmem_ro(i32 undef, i32 undef) #[[ATTR6:[0-9]+]] -; IS__CGSCC_NPM-NEXT: ret i32 [[CALL]] +; IS__CGSCC_NPM-NEXT: ret i32 10 ; %B = alloca i32, align 4 store i32 5, i32* %B, align 4 @@ -280,7 +277,7 @@ define i32 @visible_local_3() { ; IS__CGSCC_NPM-SAME: () #[[ATTR3]] { ; IS__CGSCC_NPM-NEXT: [[B:%.*]] = alloca i32, align 4 ; IS__CGSCC_NPM-NEXT: store i32 5, i32* [[B]], align 4 -; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32 @noalias_args_argmem_rn(i32* noalias nocapture nofree noundef nonnull align 4 dereferenceable(4) [[B]]) #[[ATTR7:[0-9]+]] +; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32 @noalias_args_argmem_rn(i32* noalias nocapture nofree noundef nonnull align 4 dereferenceable(4) [[B]]) #[[ATTR6:[0-9]+]] ; IS__CGSCC_NPM-NEXT: ret i32 [[CALL]] ; %B = alloca i32, align 4 @@ -313,6 +310,5 @@ attributes #1 = { argmemonly noinline nounwind uwtable willreturn} ; IS__CGSCC_NPM: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR4]] = { nounwind readonly } ; IS__CGSCC_NPM: attributes #[[ATTR5]] = { nosync nounwind readonly } -; IS__CGSCC_NPM: attributes #[[ATTR6]] = { nounwind readnone willreturn } -; IS__CGSCC_NPM: attributes #[[ATTR7]] = { nounwind willreturn } +; IS__CGSCC_NPM: attributes #[[ATTR6]] = { nounwind willreturn } ;. diff --git a/test/Transforms/Attributor/nodelete.ll b/test/Transforms/Attributor/nodelete.ll index 76840e48d0b..ff7835346b7 100644 --- a/test/Transforms/Attributor/nodelete.ll +++ b/test/Transforms/Attributor/nodelete.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals -; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=6 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM -; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=6 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM +; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=18 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM +; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=18 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM diff --git a/test/Transforms/Attributor/value-simplify-pointer-info.ll b/test/Transforms/Attributor/value-simplify-pointer-info.ll index 7c0a6e0a329..7f69ce38e6b 100644 --- a/test/Transforms/Attributor/value-simplify-pointer-info.ll +++ b/test/Transforms/Attributor/value-simplify-pointer-info.ll @@ -103,7 +103,7 @@ define void @local_alloca_simplifiable_1(%struct.S* noalias sret(%struct.S) alig ; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_S]], align 4 ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast %struct.S* [[S]] to i8* -; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I]]) #[[ATTR7:[0-9]+]] +; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I]]) #[[ATTR8:[0-9]+]] ; IS__TUNIT_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3 ; IS__TUNIT_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4 ; IS__TUNIT_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5 @@ -130,7 +130,7 @@ define void @local_alloca_simplifiable_1(%struct.S* noalias sret(%struct.S) alig ; IS__TUNIT_OPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2 ; IS__TUNIT_OPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14:![0-9]+]] ; IS__TUNIT_OPM-NEXT: [[I12:%.*]] = bitcast %struct.S* [[S]] to i8* -; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I12]]) #[[ATTR7]] +; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I12]]) #[[ATTR8]] ; IS__TUNIT_OPM-NEXT: ret void ; ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn @@ -295,11 +295,10 @@ define void @local_alloca_simplifiable_2() { ; IS__TUNIT_OPM: for.body: ; IS__TUNIT_OPM-NEXT: [[I15:%.*]] = mul nuw nsw i64 [[INDVARS_IV]], 10 ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 [[I15]] -; IS__TUNIT_OPM-NEXT: store i8 0, i8* [[ARRAYIDX]], align 2, !tbaa [[TBAA15:![0-9]+]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_INC]] ; IS__TUNIT_OPM: for.inc: ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 -; IS__TUNIT_OPM-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] +; IS__TUNIT_OPM-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] ; IS__TUNIT_OPM: for.end: ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND2:%.*]] ; IS__TUNIT_OPM: for.cond2: @@ -313,11 +312,10 @@ define void @local_alloca_simplifiable_2() { ; IS__TUNIT_OPM-NEXT: [[I17:%.*]] = mul nuw nsw i64 [[INDVARS_IV2]], 10 ; IS__TUNIT_OPM-NEXT: [[I18:%.*]] = or i64 [[I17]], 1 ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds float, float* [[I16]], i64 [[I18]] -; IS__TUNIT_OPM-NEXT: store float 0.000000e+00, float* [[ARRAYIDX8]], align 4, !tbaa [[TBAA18:![0-9]+]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_INC9]] ; IS__TUNIT_OPM: for.inc9: ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV2]], 1 -; IS__TUNIT_OPM-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP19:![0-9]+]] +; IS__TUNIT_OPM-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP17:![0-9]+]] ; IS__TUNIT_OPM: for.end11: ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND13:%.*]] ; IS__TUNIT_OPM: for.cond13: @@ -331,17 +329,15 @@ define void @local_alloca_simplifiable_2() { ; IS__TUNIT_OPM-NEXT: [[I20:%.*]] = mul nuw nsw i64 [[INDVARS_IV7]], 10 ; IS__TUNIT_OPM-NEXT: [[I21:%.*]] = add nuw nsw i64 [[I20]], 2 ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX21:%.*]] = getelementptr inbounds i64, i64* [[I19]], i64 [[I21]] -; IS__TUNIT_OPM-NEXT: store i64 0, i64* [[ARRAYIDX21]], align 16, !tbaa [[TBAA20:![0-9]+]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_INC22]] ; IS__TUNIT_OPM: for.inc22: ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 -; IS__TUNIT_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP22:![0-9]+]] +; IS__TUNIT_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP18:![0-9]+]] ; IS__TUNIT_OPM: for.end24: ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 1023 -; IS__TUNIT_OPM-NEXT: store i8 0, i8* [[ARRAYIDX25]], align 1, !tbaa [[TBAA15]] ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX26:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 500 ; IS__TUNIT_OPM-NEXT: [[I22:%.*]] = bitcast i8* [[ARRAYIDX26]] to i32* -; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(524) [[I22]], i32 noundef 0) #[[ATTR8:[0-9]+]] +; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(524) [[I22]], i32 noundef 0) #[[ATTR6:[0-9]+]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND28:%.*]] ; IS__TUNIT_OPM: for.cond28: ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC36:%.*]] ], [ 0, [[FOR_END24]] ] @@ -350,14 +346,12 @@ define void @local_alloca_simplifiable_2() { ; IS__TUNIT_OPM: for.cond.cleanup30: ; IS__TUNIT_OPM-NEXT: br label [[FOR_END38:%.*]] ; IS__TUNIT_OPM: for.body31: -; IS__TUNIT_OPM-NEXT: [[ARRAYIDX33:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 [[INDVARS_IV12]] -; IS__TUNIT_OPM-NEXT: [[I23:%.*]] = load i8, i8* [[ARRAYIDX33]], align 1, !tbaa [[TBAA15]] ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX35:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @globalBytes, i64 0, i64 [[INDVARS_IV12]] -; IS__TUNIT_OPM-NEXT: store i8 [[I23]], i8* [[ARRAYIDX35]], align 1, !tbaa [[TBAA15]] +; IS__TUNIT_OPM-NEXT: store i8 0, i8* [[ARRAYIDX35]], align 1, !tbaa [[TBAA19:![0-9]+]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_INC36]] ; IS__TUNIT_OPM: for.inc36: ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT13]] = add nuw nsw i64 [[INDVARS_IV12]], 1 -; IS__TUNIT_OPM-NEXT: br label [[FOR_COND28]], !llvm.loop [[LOOP23:![0-9]+]] +; IS__TUNIT_OPM-NEXT: br label [[FOR_COND28]], !llvm.loop [[LOOP20:![0-9]+]] ; IS__TUNIT_OPM: for.end38: ; IS__TUNIT_OPM-NEXT: [[I24:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 0 ; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 1024, i8* nocapture nofree noundef nonnull align 16 dereferenceable(1024) [[I24]]) @@ -380,11 +374,10 @@ define void @local_alloca_simplifiable_2() { ; IS__TUNIT_NPM: for.body: ; IS__TUNIT_NPM-NEXT: [[I15:%.*]] = mul nuw nsw i64 [[INDVARS_IV]], 10 ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 [[I15]] -; IS__TUNIT_NPM-NEXT: store i8 0, i8* [[ARRAYIDX]], align 2, !tbaa [[TBAA15:![0-9]+]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_INC]] ; IS__TUNIT_NPM: for.inc: ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 -; IS__TUNIT_NPM-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] +; IS__TUNIT_NPM-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] ; IS__TUNIT_NPM: for.end: ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND2:%.*]] ; IS__TUNIT_NPM: for.cond2: @@ -398,11 +391,10 @@ define void @local_alloca_simplifiable_2() { ; IS__TUNIT_NPM-NEXT: [[I17:%.*]] = mul nuw nsw i64 [[INDVARS_IV2]], 10 ; IS__TUNIT_NPM-NEXT: [[I18:%.*]] = or i64 [[I17]], 1 ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds float, float* [[I16]], i64 [[I18]] -; IS__TUNIT_NPM-NEXT: store float 0.000000e+00, float* [[ARRAYIDX8]], align 4, !tbaa [[TBAA18:![0-9]+]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_INC9]] ; IS__TUNIT_NPM: for.inc9: ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV2]], 1 -; IS__TUNIT_NPM-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP19:![0-9]+]] +; IS__TUNIT_NPM-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP17:![0-9]+]] ; IS__TUNIT_NPM: for.end11: ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND13:%.*]] ; IS__TUNIT_NPM: for.cond13: @@ -416,14 +408,12 @@ define void @local_alloca_simplifiable_2() { ; IS__TUNIT_NPM-NEXT: [[I20:%.*]] = mul nuw nsw i64 [[INDVARS_IV7]], 10 ; IS__TUNIT_NPM-NEXT: [[I21:%.*]] = add nuw nsw i64 [[I20]], 2 ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX21:%.*]] = getelementptr inbounds i64, i64* [[I19]], i64 [[I21]] -; IS__TUNIT_NPM-NEXT: store i64 0, i64* [[ARRAYIDX21]], align 16, !tbaa [[TBAA20:![0-9]+]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_INC22]] ; IS__TUNIT_NPM: for.inc22: ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 -; IS__TUNIT_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP22:![0-9]+]] +; IS__TUNIT_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP18:![0-9]+]] ; IS__TUNIT_NPM: for.end24: ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 1023 -; IS__TUNIT_NPM-NEXT: store i8 0, i8* [[ARRAYIDX25]], align 1, !tbaa [[TBAA15]] ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX26:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 500 ; IS__TUNIT_NPM-NEXT: [[I22:%.*]] = bitcast i8* [[ARRAYIDX26]] to i32* ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(524) [[I22]], i32 noundef 0) #[[ATTR4]] @@ -435,14 +425,12 @@ define void @local_alloca_simplifiable_2() { ; IS__TUNIT_NPM: for.cond.cleanup30: ; IS__TUNIT_NPM-NEXT: br label [[FOR_END38:%.*]] ; IS__TUNIT_NPM: for.body31: -; IS__TUNIT_NPM-NEXT: [[ARRAYIDX33:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 [[INDVARS_IV12]] -; IS__TUNIT_NPM-NEXT: [[I23:%.*]] = load i8, i8* [[ARRAYIDX33]], align 1, !tbaa [[TBAA15]] ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX35:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @globalBytes, i64 0, i64 [[INDVARS_IV12]] -; IS__TUNIT_NPM-NEXT: store i8 [[I23]], i8* [[ARRAYIDX35]], align 1, !tbaa [[TBAA15]] +; IS__TUNIT_NPM-NEXT: store i8 0, i8* [[ARRAYIDX35]], align 1, !tbaa [[TBAA19:![0-9]+]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_INC36]] ; IS__TUNIT_NPM: for.inc36: ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT13]] = add nuw nsw i64 [[INDVARS_IV12]], 1 -; IS__TUNIT_NPM-NEXT: br label [[FOR_COND28]], !llvm.loop [[LOOP23:![0-9]+]] +; IS__TUNIT_NPM-NEXT: br label [[FOR_COND28]], !llvm.loop [[LOOP20:![0-9]+]] ; IS__TUNIT_NPM: for.end38: ; IS__TUNIT_NPM-NEXT: [[I24:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 0 ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 1024, i8* nocapture nofree noundef nonnull align 16 dereferenceable(1024) [[I24]]) #[[ATTR6]] @@ -789,7 +777,7 @@ define i32 @multi_obj_simplifiable_1(i32 %cnd) { ; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = alloca i32, align 4 ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8* -; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR7]] +; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR8]] ; IS__TUNIT_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0 ; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]] ; IS__TUNIT_OPM: cond.true: @@ -798,7 +786,7 @@ define i32 @multi_obj_simplifiable_1(i32 %cnd) { ; IS__TUNIT_OPM-NEXT: br label [[COND_END]] ; IS__TUNIT_OPM: cond.end: ; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = bitcast i32* [[L]] to i8* -; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I2]]) #[[ATTR7]] +; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I2]]) #[[ATTR8]] ; IS__TUNIT_OPM-NEXT: ret i32 5 ; ; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn @@ -875,7 +863,7 @@ define i32 @multi_obj_simplifiable_2(i32 %cnd) { ; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = alloca i32, align 4 ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8* -; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR7]] +; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR8]] ; IS__TUNIT_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0 ; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]] ; IS__TUNIT_OPM: cond.true: @@ -884,7 +872,7 @@ define i32 @multi_obj_simplifiable_2(i32 %cnd) { ; IS__TUNIT_OPM-NEXT: br label [[COND_END]] ; IS__TUNIT_OPM: cond.end: ; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = bitcast i32* [[L]] to i8* -; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR7]] +; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR8]] ; IS__TUNIT_OPM-NEXT: ret i32 5 ; ; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn @@ -1089,9 +1077,9 @@ entry: ; } ; define void @static_global_simplifiable_2() { -; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind +; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind writeonly ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@static_global_simplifiable_2 -; IS__TUNIT_OPM-SAME: () #[[ATTR2]] { +; IS__TUNIT_OPM-SAME: () #[[ATTR6]] { ; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND:%.*]] ; IS__TUNIT_OPM: for.cond: @@ -1103,11 +1091,10 @@ define void @static_global_simplifiable_2() { ; IS__TUNIT_OPM: for.body: ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = mul nuw nsw i64 [[INDVARS_IV]], 10 ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 [[I]] -; IS__TUNIT_OPM-NEXT: store i8 0, i8* [[ARRAYIDX]], align 2, !tbaa [[TBAA15]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_INC]] ; IS__TUNIT_OPM: for.inc: ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 -; IS__TUNIT_OPM-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] +; IS__TUNIT_OPM-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]] ; IS__TUNIT_OPM: for.end: ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND2:%.*]] ; IS__TUNIT_OPM: for.cond2: @@ -1120,11 +1107,10 @@ define void @static_global_simplifiable_2() { ; IS__TUNIT_OPM-NEXT: [[I15:%.*]] = mul nuw nsw i64 [[INDVARS_IV2]], 10 ; IS__TUNIT_OPM-NEXT: [[I16:%.*]] = or i64 [[I15]], 1 ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds float, float* bitcast ([1024 x i8]* @GBytes to float*), i64 [[I16]] -; IS__TUNIT_OPM-NEXT: store float 0.000000e+00, float* [[ARRAYIDX8]], align 4, !tbaa [[TBAA18]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_INC9]] ; IS__TUNIT_OPM: for.inc9: ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV2]], 1 -; IS__TUNIT_OPM-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP25:![0-9]+]] +; IS__TUNIT_OPM-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP22:![0-9]+]] ; IS__TUNIT_OPM: for.end11: ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND13:%.*]] ; IS__TUNIT_OPM: for.cond13: @@ -1137,14 +1123,12 @@ define void @static_global_simplifiable_2() { ; IS__TUNIT_OPM-NEXT: [[I17:%.*]] = mul nuw nsw i64 [[INDVARS_IV7]], 10 ; IS__TUNIT_OPM-NEXT: [[I18:%.*]] = add nuw nsw i64 [[I17]], 2 ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds i64, i64* bitcast ([1024 x i8]* @GBytes to i64*), i64 [[I18]] -; IS__TUNIT_OPM-NEXT: store i64 0, i64* [[ARRAYIDX20]], align 16, !tbaa [[TBAA20]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_INC21]] ; IS__TUNIT_OPM: for.inc21: ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 -; IS__TUNIT_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP26:![0-9]+]] +; IS__TUNIT_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP23:![0-9]+]] ; IS__TUNIT_OPM: for.end23: -; IS__TUNIT_OPM-NEXT: store i8 0, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 1023), align 1, !tbaa [[TBAA15]] -; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(524) bitcast (i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 500) to i32*), i32 noundef 0) #[[ATTR8]] +; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(524) bitcast (i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 500) to i32*), i32 noundef 0) #[[ATTR6]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND25:%.*]] ; IS__TUNIT_OPM: for.cond25: ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC33:%.*]] ], [ 0, [[FOR_END23]] ] @@ -1153,20 +1137,18 @@ define void @static_global_simplifiable_2() { ; IS__TUNIT_OPM: for.cond.cleanup27: ; IS__TUNIT_OPM-NEXT: br label [[FOR_END35:%.*]] ; IS__TUNIT_OPM: for.body28: -; IS__TUNIT_OPM-NEXT: [[ARRAYIDX30:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 [[INDVARS_IV12]] -; IS__TUNIT_OPM-NEXT: [[I19:%.*]] = load i8, i8* [[ARRAYIDX30]], align 1, !tbaa [[TBAA15]] ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @globalBytes, i64 0, i64 [[INDVARS_IV12]] -; IS__TUNIT_OPM-NEXT: store i8 [[I19]], i8* [[ARRAYIDX32]], align 1, !tbaa [[TBAA15]] +; IS__TUNIT_OPM-NEXT: store i8 0, i8* [[ARRAYIDX32]], align 1, !tbaa [[TBAA19]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_INC33]] ; IS__TUNIT_OPM: for.inc33: ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT13]] = add nuw nsw i64 [[INDVARS_IV12]], 1 -; IS__TUNIT_OPM-NEXT: br label [[FOR_COND25]], !llvm.loop [[LOOP27:![0-9]+]] +; IS__TUNIT_OPM-NEXT: br label [[FOR_COND25]], !llvm.loop [[LOOP24:![0-9]+]] ; IS__TUNIT_OPM: for.end35: ; IS__TUNIT_OPM-NEXT: ret void ; -; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn +; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@static_global_simplifiable_2 -; IS__TUNIT_NPM-SAME: () #[[ATTR2]] { +; IS__TUNIT_NPM-SAME: () #[[ATTR4]] { ; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND:%.*]] ; IS__TUNIT_NPM: for.cond: @@ -1178,11 +1160,10 @@ define void @static_global_simplifiable_2() { ; IS__TUNIT_NPM: for.body: ; IS__TUNIT_NPM-NEXT: [[I:%.*]] = mul nuw nsw i64 [[INDVARS_IV]], 10 ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 [[I]] -; IS__TUNIT_NPM-NEXT: store i8 0, i8* [[ARRAYIDX]], align 2, !tbaa [[TBAA15]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_INC]] ; IS__TUNIT_NPM: for.inc: ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 -; IS__TUNIT_NPM-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] +; IS__TUNIT_NPM-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]] ; IS__TUNIT_NPM: for.end: ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND2:%.*]] ; IS__TUNIT_NPM: for.cond2: @@ -1195,11 +1176,10 @@ define void @static_global_simplifiable_2() { ; IS__TUNIT_NPM-NEXT: [[I15:%.*]] = mul nuw nsw i64 [[INDVARS_IV2]], 10 ; IS__TUNIT_NPM-NEXT: [[I16:%.*]] = or i64 [[I15]], 1 ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds float, float* bitcast ([1024 x i8]* @GBytes to float*), i64 [[I16]] -; IS__TUNIT_NPM-NEXT: store float 0.000000e+00, float* [[ARRAYIDX8]], align 4, !tbaa [[TBAA18]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_INC9]] ; IS__TUNIT_NPM: for.inc9: ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV2]], 1 -; IS__TUNIT_NPM-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP25:![0-9]+]] +; IS__TUNIT_NPM-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP22:![0-9]+]] ; IS__TUNIT_NPM: for.end11: ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND13:%.*]] ; IS__TUNIT_NPM: for.cond13: @@ -1212,13 +1192,11 @@ define void @static_global_simplifiable_2() { ; IS__TUNIT_NPM-NEXT: [[I17:%.*]] = mul nuw nsw i64 [[INDVARS_IV7]], 10 ; IS__TUNIT_NPM-NEXT: [[I18:%.*]] = add nuw nsw i64 [[I17]], 2 ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds i64, i64* bitcast ([1024 x i8]* @GBytes to i64*), i64 [[I18]] -; IS__TUNIT_NPM-NEXT: store i64 0, i64* [[ARRAYIDX20]], align 16, !tbaa [[TBAA20]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_INC21]] ; IS__TUNIT_NPM: for.inc21: ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 -; IS__TUNIT_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP26:![0-9]+]] +; IS__TUNIT_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP23:![0-9]+]] ; IS__TUNIT_NPM: for.end23: -; IS__TUNIT_NPM-NEXT: store i8 0, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 1023), align 1, !tbaa [[TBAA15]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(524) bitcast (i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 500) to i32*), i32 noundef 0) #[[ATTR4]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND25:%.*]] ; IS__TUNIT_NPM: for.cond25: @@ -1228,14 +1206,12 @@ define void @static_global_simplifiable_2() { ; IS__TUNIT_NPM: for.cond.cleanup27: ; IS__TUNIT_NPM-NEXT: br label [[FOR_END35:%.*]] ; IS__TUNIT_NPM: for.body28: -; IS__TUNIT_NPM-NEXT: [[ARRAYIDX30:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 [[INDVARS_IV12]] -; IS__TUNIT_NPM-NEXT: [[I19:%.*]] = load i8, i8* [[ARRAYIDX30]], align 1, !tbaa [[TBAA15]] ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @globalBytes, i64 0, i64 [[INDVARS_IV12]] -; IS__TUNIT_NPM-NEXT: store i8 [[I19]], i8* [[ARRAYIDX32]], align 1, !tbaa [[TBAA15]] +; IS__TUNIT_NPM-NEXT: store i8 0, i8* [[ARRAYIDX32]], align 1, !tbaa [[TBAA19]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_INC33]] ; IS__TUNIT_NPM: for.inc33: ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT13]] = add nuw nsw i64 [[INDVARS_IV12]], 1 -; IS__TUNIT_NPM-NEXT: br label [[FOR_COND25]], !llvm.loop [[LOOP27:![0-9]+]] +; IS__TUNIT_NPM-NEXT: br label [[FOR_COND25]], !llvm.loop [[LOOP24:![0-9]+]] ; IS__TUNIT_NPM: for.end35: ; IS__TUNIT_NPM-NEXT: ret void ; @@ -1682,11 +1658,11 @@ define void @noalias_arg_simplifiable_2(i8* %Bytes) { ; IS__TUNIT_OPM: for.body: ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = mul nuw nsw i64 [[INDVARS_IV]], 10 ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 [[I]] -; IS__TUNIT_OPM-NEXT: store i8 0, i8* [[ARRAYIDX]], align 1, !tbaa [[TBAA15]] +; IS__TUNIT_OPM-NEXT: store i8 0, i8* [[ARRAYIDX]], align 1, !tbaa [[TBAA19]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_INC]] ; IS__TUNIT_OPM: for.inc: ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 -; IS__TUNIT_OPM-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] +; IS__TUNIT_OPM-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] ; IS__TUNIT_OPM: for.end: ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND2:%.*]] ; IS__TUNIT_OPM: for.cond2: @@ -1700,11 +1676,11 @@ define void @noalias_arg_simplifiable_2(i8* %Bytes) { ; IS__TUNIT_OPM-NEXT: [[I16:%.*]] = mul nuw nsw i64 [[INDVARS_IV2]], 10 ; IS__TUNIT_OPM-NEXT: [[I17:%.*]] = or i64 [[I16]], 1 ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds float, float* [[I15]], i64 [[I17]] -; IS__TUNIT_OPM-NEXT: store float 0.000000e+00, float* [[ARRAYIDX8]], align 4, !tbaa [[TBAA18]] +; IS__TUNIT_OPM-NEXT: store float 0.000000e+00, float* [[ARRAYIDX8]], align 4, !tbaa [[TBAA26:![0-9]+]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_INC9]] ; IS__TUNIT_OPM: for.inc9: ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV2]], 1 -; IS__TUNIT_OPM-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP29:![0-9]+]] +; IS__TUNIT_OPM-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP27:![0-9]+]] ; IS__TUNIT_OPM: for.end11: ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND13:%.*]] ; IS__TUNIT_OPM: for.cond13: @@ -1718,17 +1694,17 @@ define void @noalias_arg_simplifiable_2(i8* %Bytes) { ; IS__TUNIT_OPM-NEXT: [[I19:%.*]] = mul nuw nsw i64 [[INDVARS_IV7]], 10 ; IS__TUNIT_OPM-NEXT: [[I20:%.*]] = add nuw nsw i64 [[I19]], 2 ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds i64, i64* [[I18]], i64 [[I20]] -; IS__TUNIT_OPM-NEXT: store i64 0, i64* [[ARRAYIDX20]], align 8, !tbaa [[TBAA20]] +; IS__TUNIT_OPM-NEXT: store i64 0, i64* [[ARRAYIDX20]], align 8, !tbaa [[TBAA28:![0-9]+]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_INC21]] ; IS__TUNIT_OPM: for.inc21: ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP30:![0-9]+]] ; IS__TUNIT_OPM: for.end23: ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 1023 -; IS__TUNIT_OPM-NEXT: store i8 0, i8* [[ARRAYIDX24]], align 1, !tbaa [[TBAA15]] +; IS__TUNIT_OPM-NEXT: store i8 0, i8* [[ARRAYIDX24]], align 1, !tbaa [[TBAA19]] ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 500 ; IS__TUNIT_OPM-NEXT: [[I21:%.*]] = bitcast i8* [[ARRAYIDX25]] to i32* -; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 [[I21]], i32 noundef 0) #[[ATTR8]] +; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 [[I21]], i32 noundef 0) #[[ATTR6]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND27:%.*]] ; IS__TUNIT_OPM: for.cond27: ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC35:%.*]] ], [ 0, [[FOR_END23]] ] @@ -1738,9 +1714,9 @@ define void @noalias_arg_simplifiable_2(i8* %Bytes) { ; IS__TUNIT_OPM-NEXT: br label [[FOR_END37:%.*]] ; IS__TUNIT_OPM: for.body30: ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 [[INDVARS_IV12]] -; IS__TUNIT_OPM-NEXT: [[I22:%.*]] = load i8, i8* [[ARRAYIDX32]], align 1, !tbaa [[TBAA15]] +; IS__TUNIT_OPM-NEXT: [[I22:%.*]] = load i8, i8* [[ARRAYIDX32]], align 1, !tbaa [[TBAA19]] ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX34:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @globalBytes, i64 0, i64 [[INDVARS_IV12]] -; IS__TUNIT_OPM-NEXT: store i8 [[I22]], i8* [[ARRAYIDX34]], align 1, !tbaa [[TBAA15]] +; IS__TUNIT_OPM-NEXT: store i8 [[I22]], i8* [[ARRAYIDX34]], align 1, !tbaa [[TBAA19]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_INC35]] ; IS__TUNIT_OPM: for.inc35: ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT13]] = add nuw nsw i64 [[INDVARS_IV12]], 1 @@ -1762,11 +1738,11 @@ define void @noalias_arg_simplifiable_2(i8* %Bytes) { ; IS__TUNIT_NPM: for.body: ; IS__TUNIT_NPM-NEXT: [[I:%.*]] = mul nuw nsw i64 [[INDVARS_IV]], 10 ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 [[I]] -; IS__TUNIT_NPM-NEXT: store i8 0, i8* [[ARRAYIDX]], align 1, !tbaa [[TBAA15]] +; IS__TUNIT_NPM-NEXT: store i8 0, i8* [[ARRAYIDX]], align 1, !tbaa [[TBAA19]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_INC]] ; IS__TUNIT_NPM: for.inc: ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 -; IS__TUNIT_NPM-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] +; IS__TUNIT_NPM-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] ; IS__TUNIT_NPM: for.end: ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND2:%.*]] ; IS__TUNIT_NPM: for.cond2: @@ -1780,11 +1756,11 @@ define void @noalias_arg_simplifiable_2(i8* %Bytes) { ; IS__TUNIT_NPM-NEXT: [[I16:%.*]] = mul nuw nsw i64 [[INDVARS_IV2]], 10 ; IS__TUNIT_NPM-NEXT: [[I17:%.*]] = or i64 [[I16]], 1 ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds float, float* [[I15]], i64 [[I17]] -; IS__TUNIT_NPM-NEXT: store float 0.000000e+00, float* [[ARRAYIDX8]], align 4, !tbaa [[TBAA18]] +; IS__TUNIT_NPM-NEXT: store float 0.000000e+00, float* [[ARRAYIDX8]], align 4, !tbaa [[TBAA26:![0-9]+]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_INC9]] ; IS__TUNIT_NPM: for.inc9: ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV2]], 1 -; IS__TUNIT_NPM-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP29:![0-9]+]] +; IS__TUNIT_NPM-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP27:![0-9]+]] ; IS__TUNIT_NPM: for.end11: ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND13:%.*]] ; IS__TUNIT_NPM: for.cond13: @@ -1798,14 +1774,14 @@ define void @noalias_arg_simplifiable_2(i8* %Bytes) { ; IS__TUNIT_NPM-NEXT: [[I19:%.*]] = mul nuw nsw i64 [[INDVARS_IV7]], 10 ; IS__TUNIT_NPM-NEXT: [[I20:%.*]] = add nuw nsw i64 [[I19]], 2 ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds i64, i64* [[I18]], i64 [[I20]] -; IS__TUNIT_NPM-NEXT: store i64 0, i64* [[ARRAYIDX20]], align 8, !tbaa [[TBAA20]] +; IS__TUNIT_NPM-NEXT: store i64 0, i64* [[ARRAYIDX20]], align 8, !tbaa [[TBAA28:![0-9]+]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_INC21]] ; IS__TUNIT_NPM: for.inc21: ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP30:![0-9]+]] ; IS__TUNIT_NPM: for.end23: ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 1023 -; IS__TUNIT_NPM-NEXT: store i8 0, i8* [[ARRAYIDX24]], align 1, !tbaa [[TBAA15]] +; IS__TUNIT_NPM-NEXT: store i8 0, i8* [[ARRAYIDX24]], align 1, !tbaa [[TBAA19]] ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 500 ; IS__TUNIT_NPM-NEXT: [[I21:%.*]] = bitcast i8* [[ARRAYIDX25]] to i32* ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 [[I21]], i32 noundef 0) #[[ATTR4]] @@ -1818,9 +1794,9 @@ define void @noalias_arg_simplifiable_2(i8* %Bytes) { ; IS__TUNIT_NPM-NEXT: br label [[FOR_END37:%.*]] ; IS__TUNIT_NPM: for.body30: ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 [[INDVARS_IV12]] -; IS__TUNIT_NPM-NEXT: [[I22:%.*]] = load i8, i8* [[ARRAYIDX32]], align 1, !tbaa [[TBAA15]] +; IS__TUNIT_NPM-NEXT: [[I22:%.*]] = load i8, i8* [[ARRAYIDX32]], align 1, !tbaa [[TBAA19]] ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX34:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @globalBytes, i64 0, i64 [[INDVARS_IV12]] -; IS__TUNIT_NPM-NEXT: store i8 [[I22]], i8* [[ARRAYIDX34]], align 1, !tbaa [[TBAA15]] +; IS__TUNIT_NPM-NEXT: store i8 [[I22]], i8* [[ARRAYIDX34]], align 1, !tbaa [[TBAA19]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_INC35]] ; IS__TUNIT_NPM: for.inc35: ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT13]] = add nuw nsw i64 [[INDVARS_IV12]], 1 @@ -2015,30 +1991,30 @@ for.end37: ; preds = %for.cond.cleanup29 ; } ; define i32 @local_alloca_not_simplifiable_1() { -; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@local_alloca_not_simplifiable_1() { -; IS__TUNIT_OPM-NEXT: entry: -; IS__TUNIT_OPM-NEXT: [[X:%.*]] = alloca i32, align 4 -; IS__TUNIT_OPM-NEXT: [[Y:%.*]] = alloca i32, align 4 -; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast i32* [[X]] to i8* -; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR7]] -; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = bitcast i32* [[Y]] to i8* -; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR7]] -; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[Y]], align 4, !tbaa [[TBAA3]] -; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[X]], align 4, !tbaa [[TBAA3]] -; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = bitcast i32* [[X]] to i8* -; IS__TUNIT_OPM-NEXT: call void @escape(i8* noundef nonnull align 4 dereferenceable(4) [[I2]]) -; IS__TUNIT_OPM-NEXT: call void @write_random(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[Y]]) -; IS__TUNIT_OPM-NEXT: [[I3:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA3]] -; IS__TUNIT_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[I3]], 0 -; IS__TUNIT_OPM-NEXT: [[COND:%.*]] = select i1 [[TOBOOL_NOT]], i32 2, i32 1 -; IS__TUNIT_OPM-NEXT: [[I4:%.*]] = load i32, i32* [[Y]], align 4, !tbaa [[TBAA3]] -; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = add nsw i32 [[I3]], [[I4]] -; IS__TUNIT_OPM-NEXT: [[ADD1:%.*]] = add nsw i32 [[ADD]], [[COND]] -; IS__TUNIT_OPM-NEXT: [[I5:%.*]] = bitcast i32* [[Y]] to i8* -; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I5]]) -; IS__TUNIT_OPM-NEXT: [[I6:%.*]] = bitcast i32* [[X]] to i8* -; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I6]]) -; IS__TUNIT_OPM-NEXT: ret i32 [[ADD1]] +; NOT_TUNIT_NPM-LABEL: define {{[^@]+}}@local_alloca_not_simplifiable_1() { +; NOT_TUNIT_NPM-NEXT: entry: +; NOT_TUNIT_NPM-NEXT: [[X:%.*]] = alloca i32, align 4 +; NOT_TUNIT_NPM-NEXT: [[Y:%.*]] = alloca i32, align 4 +; NOT_TUNIT_NPM-NEXT: [[I:%.*]] = bitcast i32* [[X]] to i8* +; NOT_TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR8:[0-9]+]] +; NOT_TUNIT_NPM-NEXT: [[I1:%.*]] = bitcast i32* [[Y]] to i8* +; NOT_TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR8]] +; NOT_TUNIT_NPM-NEXT: store i32 1, i32* [[Y]], align 4, !tbaa [[TBAA3]] +; NOT_TUNIT_NPM-NEXT: store i32 1, i32* [[X]], align 4, !tbaa [[TBAA3]] +; NOT_TUNIT_NPM-NEXT: [[I2:%.*]] = bitcast i32* [[X]] to i8* +; NOT_TUNIT_NPM-NEXT: call void @escape(i8* noundef nonnull align 4 dereferenceable(4) [[I2]]) +; NOT_TUNIT_NPM-NEXT: call void @write_random(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[Y]]) +; NOT_TUNIT_NPM-NEXT: [[I3:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA3]] +; NOT_TUNIT_NPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[I3]], 0 +; NOT_TUNIT_NPM-NEXT: [[COND:%.*]] = select i1 [[TOBOOL_NOT]], i32 2, i32 1 +; NOT_TUNIT_NPM-NEXT: [[I4:%.*]] = load i32, i32* [[Y]], align 4, !tbaa [[TBAA3]] +; NOT_TUNIT_NPM-NEXT: [[ADD:%.*]] = add nsw i32 [[I3]], [[I4]] +; NOT_TUNIT_NPM-NEXT: [[ADD1:%.*]] = add nsw i32 [[ADD]], [[COND]] +; NOT_TUNIT_NPM-NEXT: [[I5:%.*]] = bitcast i32* [[Y]] to i8* +; NOT_TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I5]]) +; NOT_TUNIT_NPM-NEXT: [[I6:%.*]] = bitcast i32* [[X]] to i8* +; NOT_TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I6]]) +; NOT_TUNIT_NPM-NEXT: ret i32 [[ADD1]] ; ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@local_alloca_not_simplifiable_1() { ; IS__TUNIT_NPM-NEXT: entry: @@ -2065,31 +2041,6 @@ define i32 @local_alloca_not_simplifiable_1() { ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I6]]) ; IS__TUNIT_NPM-NEXT: ret i32 [[ADD1]] ; -; IS__CGSCC____-LABEL: define {{[^@]+}}@local_alloca_not_simplifiable_1() { -; IS__CGSCC____-NEXT: entry: -; IS__CGSCC____-NEXT: [[X:%.*]] = alloca i32, align 4 -; IS__CGSCC____-NEXT: [[Y:%.*]] = alloca i32, align 4 -; IS__CGSCC____-NEXT: [[I:%.*]] = bitcast i32* [[X]] to i8* -; IS__CGSCC____-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR8]] -; IS__CGSCC____-NEXT: [[I1:%.*]] = bitcast i32* [[Y]] to i8* -; IS__CGSCC____-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR8]] -; IS__CGSCC____-NEXT: store i32 1, i32* [[Y]], align 4, !tbaa [[TBAA3]] -; IS__CGSCC____-NEXT: store i32 1, i32* [[X]], align 4, !tbaa [[TBAA3]] -; IS__CGSCC____-NEXT: [[I2:%.*]] = bitcast i32* [[X]] to i8* -; IS__CGSCC____-NEXT: call void @escape(i8* noundef nonnull align 4 dereferenceable(4) [[I2]]) -; IS__CGSCC____-NEXT: call void @write_random(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[Y]]) -; IS__CGSCC____-NEXT: [[I3:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA3]] -; IS__CGSCC____-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[I3]], 0 -; IS__CGSCC____-NEXT: [[COND:%.*]] = select i1 [[TOBOOL_NOT]], i32 2, i32 1 -; IS__CGSCC____-NEXT: [[I4:%.*]] = load i32, i32* [[Y]], align 4, !tbaa [[TBAA3]] -; IS__CGSCC____-NEXT: [[ADD:%.*]] = add nsw i32 [[I3]], [[I4]] -; IS__CGSCC____-NEXT: [[ADD1:%.*]] = add nsw i32 [[ADD]], [[COND]] -; IS__CGSCC____-NEXT: [[I5:%.*]] = bitcast i32* [[Y]] to i8* -; IS__CGSCC____-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I5]]) -; IS__CGSCC____-NEXT: [[I6:%.*]] = bitcast i32* [[X]] to i8* -; IS__CGSCC____-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I6]]) -; IS__CGSCC____-NEXT: ret i32 [[ADD1]] -; entry: %X = alloca i32, align 4 %Y = alloca i32, align 4 @@ -2257,7 +2208,7 @@ declare void @escape(i8*) define i32 @global_not_simplifiable_1(i32 %cnd) { ; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readonly willreturn ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@global_not_simplifiable_1 -; IS__TUNIT_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR6:[0-9]+]] { +; IS__TUNIT_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR7:[0-9]+]] { ; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = load i32, i32* @Flag0, align 4, !tbaa [[TBAA3]] ; IS__TUNIT_OPM-NEXT: ret i32 [[I]] @@ -2408,7 +2359,7 @@ define void @write_global() { define i32 @read_global() { ; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readonly willreturn ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@read_global -; IS__TUNIT_OPM-SAME: () #[[ATTR6]] { +; IS__TUNIT_OPM-SAME: () #[[ATTR7]] { ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gint2, align 4 ; IS__TUNIT_OPM-NEXT: ret i32 [[L]] ; @@ -2479,7 +2430,7 @@ define void @write_static_global() { define i32 @read_static_global() { ; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readonly willreturn ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@read_static_global -; IS__TUNIT_OPM-SAME: () #[[ATTR6]] { +; IS__TUNIT_OPM-SAME: () #[[ATTR7]] { ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gstatic_int2, align 4 ; IS__TUNIT_OPM-NEXT: ret i32 [[L]] ; @@ -2611,9 +2562,9 @@ define i32 @single_read_of_static_global() { ; IS__TUNIT_OPM: attributes #[[ATTR3]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR4]] = { nofree nosync nounwind willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR5]] = { nofree nosync nounwind willreturn writeonly } -; IS__TUNIT_OPM: attributes #[[ATTR6]] = { nofree nosync nounwind readonly willreturn } -; IS__TUNIT_OPM: attributes #[[ATTR7]] = { willreturn } -; IS__TUNIT_OPM: attributes #[[ATTR8]] = { nofree nosync nounwind writeonly } +; IS__TUNIT_OPM: attributes #[[ATTR6]] = { nofree nosync nounwind writeonly } +; IS__TUNIT_OPM: attributes #[[ATTR7]] = { nofree nosync nounwind readonly willreturn } +; IS__TUNIT_OPM: attributes #[[ATTR8]] = { willreturn } ;. ; IS__TUNIT_NPM: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR1]] = { argmemonly nofree nosync nounwind willreturn } @@ -2635,36 +2586,69 @@ define i32 @single_read_of_static_global() { ; IS__CGSCC____: attributes #[[ATTR9]] = { nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR10]] = { nounwind writeonly } ;. -; CHECK: [[META0:![0-9]+]] = !{i32 1, !"wchar_size", i32 4} -; CHECK: [[META1:![0-9]+]] = !{i32 7, !"uwtable", i32 1} -; CHECK: [[META2:![0-9]+]] = !{!"clang version 13.0.0"} -; CHECK: [[TBAA3]] = !{!4, !4, i64 0} -; CHECK: [[META4:![0-9]+]] = !{!"int", !5, i64 0} -; CHECK: [[META5:![0-9]+]] = !{!"omnipotent char", !6, i64 0} -; CHECK: [[META6:![0-9]+]] = !{!"Simple C/C++ TBAA"} -; CHECK: [[META7:![0-9]+]] = !{!8, !9, i64 12} -; CHECK: [[META8:![0-9]+]] = !{!"S", !4, i64 0, !4, i64 4, !4, i64 8, !9, i64 12, !9, i64 16, !9, i64 20} -; CHECK: [[META9:![0-9]+]] = !{!"float", !5, i64 0} -; CHECK: [[META10:![0-9]+]] = !{!8, !9, i64 16} -; CHECK: [[META11:![0-9]+]] = !{!8, !9, i64 20} -; CHECK: [[META12:![0-9]+]] = !{!8, !4, i64 0} -; CHECK: [[META13:![0-9]+]] = !{!8, !4, i64 4} -; CHECK: [[META14:![0-9]+]] = !{!8, !4, i64 8} -; CHECK: [[META15:![0-9]+]] = !{!5, !5, i64 0} -; CHECK: [[META16:![0-9]+]] = distinct !{!16, !17} -; CHECK: [[META17:![0-9]+]] = !{!"llvm.loop.mustprogress"} -; CHECK: [[META18:![0-9]+]] = !{!9, !9, i64 0} -; CHECK: [[META19:![0-9]+]] = distinct !{!19, !17} -; CHECK: [[META20:![0-9]+]] = !{!21, !21, i64 0} -; CHECK: [[META21:![0-9]+]] = !{!"long long", !5, i64 0} -; CHECK: [[META22:![0-9]+]] = distinct !{!22, !17} -; CHECK: [[META23:![0-9]+]] = distinct !{!23, !17} -; CHECK: [[META24:![0-9]+]] = distinct !{!24, !17} -; CHECK: [[META25:![0-9]+]] = distinct !{!25, !17} -; CHECK: [[META26:![0-9]+]] = distinct !{!26, !17} -; CHECK: [[META27:![0-9]+]] = distinct !{!27, !17} -; CHECK: [[META28:![0-9]+]] = distinct !{!28, !17} -; CHECK: [[META29:![0-9]+]] = distinct !{!29, !17} -; CHECK: [[META30:![0-9]+]] = distinct !{!30, !17} -; CHECK: [[META31:![0-9]+]] = distinct !{!31, !17} +; IS__TUNIT____: [[META0:![0-9]+]] = !{i32 1, !"wchar_size", i32 4} +; IS__TUNIT____: [[META1:![0-9]+]] = !{i32 7, !"uwtable", i32 1} +; IS__TUNIT____: [[META2:![0-9]+]] = !{!"clang version 13.0.0"} +; IS__TUNIT____: [[TBAA3]] = !{!4, !4, i64 0} +; IS__TUNIT____: [[META4:![0-9]+]] = !{!"int", !5, i64 0} +; IS__TUNIT____: [[META5:![0-9]+]] = !{!"omnipotent char", !6, i64 0} +; IS__TUNIT____: [[META6:![0-9]+]] = !{!"Simple C/C++ TBAA"} +; IS__TUNIT____: [[META7:![0-9]+]] = !{!8, !9, i64 12} +; IS__TUNIT____: [[META8:![0-9]+]] = !{!"S", !4, i64 0, !4, i64 4, !4, i64 8, !9, i64 12, !9, i64 16, !9, i64 20} +; IS__TUNIT____: [[META9:![0-9]+]] = !{!"float", !5, i64 0} +; IS__TUNIT____: [[META10:![0-9]+]] = !{!8, !9, i64 16} +; IS__TUNIT____: [[META11:![0-9]+]] = !{!8, !9, i64 20} +; IS__TUNIT____: [[META12:![0-9]+]] = !{!8, !4, i64 0} +; IS__TUNIT____: [[META13:![0-9]+]] = !{!8, !4, i64 4} +; IS__TUNIT____: [[META14:![0-9]+]] = !{!8, !4, i64 8} +; IS__TUNIT____: [[META15:![0-9]+]] = distinct !{!15, !16} +; IS__TUNIT____: [[META16:![0-9]+]] = !{!"llvm.loop.mustprogress"} +; IS__TUNIT____: [[META17:![0-9]+]] = distinct !{!17, !16} +; IS__TUNIT____: [[META18:![0-9]+]] = distinct !{!18, !16} +; IS__TUNIT____: [[META19:![0-9]+]] = !{!5, !5, i64 0} +; IS__TUNIT____: [[META20:![0-9]+]] = distinct !{!20, !16} +; IS__TUNIT____: [[META21:![0-9]+]] = distinct !{!21, !16} +; IS__TUNIT____: [[META22:![0-9]+]] = distinct !{!22, !16} +; IS__TUNIT____: [[META23:![0-9]+]] = distinct !{!23, !16} +; IS__TUNIT____: [[META24:![0-9]+]] = distinct !{!24, !16} +; IS__TUNIT____: [[META25:![0-9]+]] = distinct !{!25, !16} +; IS__TUNIT____: [[META26:![0-9]+]] = !{!9, !9, i64 0} +; IS__TUNIT____: [[META27:![0-9]+]] = distinct !{!27, !16} +; IS__TUNIT____: [[META28:![0-9]+]] = !{!29, !29, i64 0} +; IS__TUNIT____: [[META29:![0-9]+]] = !{!"long long", !5, i64 0} +; IS__TUNIT____: [[META30:![0-9]+]] = distinct !{!30, !16} +; IS__TUNIT____: [[META31:![0-9]+]] = distinct !{!31, !16} +;. +; IS__CGSCC____: [[META0:![0-9]+]] = !{i32 1, !"wchar_size", i32 4} +; IS__CGSCC____: [[META1:![0-9]+]] = !{i32 7, !"uwtable", i32 1} +; IS__CGSCC____: [[META2:![0-9]+]] = !{!"clang version 13.0.0"} +; IS__CGSCC____: [[TBAA3]] = !{!4, !4, i64 0} +; IS__CGSCC____: [[META4:![0-9]+]] = !{!"int", !5, i64 0} +; IS__CGSCC____: [[META5:![0-9]+]] = !{!"omnipotent char", !6, i64 0} +; IS__CGSCC____: [[META6:![0-9]+]] = !{!"Simple C/C++ TBAA"} +; IS__CGSCC____: [[TBAA7]] = !{!8, !9, i64 12} +; IS__CGSCC____: [[META8:![0-9]+]] = !{!"S", !4, i64 0, !4, i64 4, !4, i64 8, !9, i64 12, !9, i64 16, !9, i64 20} +; IS__CGSCC____: [[META9:![0-9]+]] = !{!"float", !5, i64 0} +; IS__CGSCC____: [[TBAA10]] = !{!8, !9, i64 16} +; IS__CGSCC____: [[TBAA11]] = !{!8, !9, i64 20} +; IS__CGSCC____: [[TBAA12]] = !{!8, !4, i64 0} +; IS__CGSCC____: [[TBAA13]] = !{!8, !4, i64 4} +; IS__CGSCC____: [[TBAA14]] = !{!8, !4, i64 8} +; IS__CGSCC____: [[TBAA15]] = !{!5, !5, i64 0} +; IS__CGSCC____: [[META16:![0-9]+]] = distinct !{!16, !17} +; IS__CGSCC____: [[META17:![0-9]+]] = !{!"llvm.loop.mustprogress"} +; IS__CGSCC____: [[TBAA18]] = !{!9, !9, i64 0} +; IS__CGSCC____: [[META19:![0-9]+]] = distinct !{!19, !17} +; IS__CGSCC____: [[TBAA20]] = !{!21, !21, i64 0} +; IS__CGSCC____: [[META21:![0-9]+]] = !{!"long long", !5, i64 0} +; IS__CGSCC____: [[META22:![0-9]+]] = distinct !{!22, !17} +; IS__CGSCC____: [[META23:![0-9]+]] = distinct !{!23, !17} +; IS__CGSCC____: [[LOOP24]] = distinct !{!24, !17} +; IS__CGSCC____: [[LOOP25]] = distinct !{!25, !17} +; IS__CGSCC____: [[LOOP26]] = distinct !{!26, !17} +; IS__CGSCC____: [[LOOP27]] = distinct !{!27, !17} +; IS__CGSCC____: [[LOOP28]] = distinct !{!28, !17} +; IS__CGSCC____: [[LOOP29]] = distinct !{!29, !17} +; IS__CGSCC____: [[LOOP30]] = distinct !{!30, !17} +; IS__CGSCC____: [[LOOP31]] = distinct !{!31, !17} ;. diff --git a/test/Transforms/Attributor/value-simplify.ll b/test/Transforms/Attributor/value-simplify.ll index 821ac174dcf..d30f11bda95 100644 --- a/test/Transforms/Attributor/value-simplify.ll +++ b/test/Transforms/Attributor/value-simplify.ll @@ -613,14 +613,14 @@ define internal i8*@test_byval2(%struct.X* byval(%struct.X) %a) { ; IS__TUNIT_NPM-NEXT: ret i8* [[L]] ; ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test_byval2 -; IS__CGSCC_NPM-SAME: (i8* noalias nofree readnone "no-capture-maybe-returned" [[TMP0:%.*]]) { +; IS__CGSCC_NPM-SAME: (i8* noalias nofree readnone returned "no-capture-maybe-returned" [[TMP0:%.*]]) { ; IS__CGSCC_NPM-NEXT: [[A_PRIV:%.*]] = alloca [[STRUCT_X:%.*]], align 8 ; IS__CGSCC_NPM-NEXT: [[A_PRIV_CAST:%.*]] = bitcast %struct.X* [[A_PRIV]] to i8** ; IS__CGSCC_NPM-NEXT: store i8* [[TMP0]], i8** [[A_PRIV_CAST]], align 8 ; IS__CGSCC_NPM-NEXT: call void @sync() ; IS__CGSCC_NPM-NEXT: [[G0:%.*]] = getelementptr [[STRUCT_X]], %struct.X* [[A_PRIV]], i32 0, i32 0 ; IS__CGSCC_NPM-NEXT: [[L:%.*]] = load i8*, i8** [[G0]], align 8 -; IS__CGSCC_NPM-NEXT: ret i8* [[L]] +; IS__CGSCC_NPM-NEXT: ret i8* [[TMP0]] ; call void @sync() %g0 = getelementptr %struct.X, %struct.X* %a, i32 0, i32 0 @@ -646,7 +646,7 @@ define i8* @complicated_args_byval2() { ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@complicated_args_byval2() { ; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = load i8*, i8** getelementptr inbounds ([[STRUCT_X:%.*]], %struct.X* @S, i32 0, i32 0), align 8 ; IS__CGSCC_NPM-NEXT: [[C:%.*]] = call i8* @test_byval2(i8* noalias nofree readnone "no-capture-maybe-returned" [[TMP1]]) -; IS__CGSCC_NPM-NEXT: ret i8* [[C]] +; IS__CGSCC_NPM-NEXT: ret i8* [[TMP1]] ; %c = call i8* @test_byval2(%struct.X* byval(%struct.X) @S) ret i8* %c