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https://github.com/RPCS3/llvm-mirror.git
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[MIPS GlobalISel] Select population count (popcount)
G_CTPOP is generated from llvm.ctpop.<type> intrinsics, clang generates these intrinsics from __builtin_popcount and __builtin_popcountll. Add lower and narrow scalar for G_CTPOP. Lower G_CTPOP for MIPS32. Differential Revision: https://reviews.llvm.org/D73216
This commit is contained in:
Petar Avramovic
parent
4b729fba3d
commit
75e76863f0
@ -243,6 +243,7 @@ public:
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LegalizeResult narrowScalarSelect(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
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LegalizeResult narrowScalarCTLZ(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
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LegalizeResult narrowScalarCTTZ(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
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LegalizeResult narrowScalarCTPOP(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
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LegalizeResult lowerBitcast(MachineInstr &MI);
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LegalizeResult lowerBitCount(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
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@ -983,6 +983,8 @@ LegalizerHelper::LegalizeResult LegalizerHelper::narrowScalar(MachineInstr &MI,
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return narrowScalarCTLZ(MI, TypeIdx, NarrowTy);
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case TargetOpcode::G_CTTZ:
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return narrowScalarCTTZ(MI, TypeIdx, NarrowTy);
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case TargetOpcode::G_CTPOP:
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return narrowScalarCTPOP(MI, TypeIdx, NarrowTy);
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default:
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return UnableToLegalize;
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}
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@ -3918,6 +3920,30 @@ LegalizerHelper::narrowScalarCTTZ(MachineInstr &MI, unsigned TypeIdx,
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return UnableToLegalize;
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}
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LegalizerHelper::LegalizeResult
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LegalizerHelper::narrowScalarCTPOP(MachineInstr &MI, unsigned TypeIdx,
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LLT NarrowTy) {
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if (TypeIdx != 1)
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return UnableToLegalize;
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LLT SrcTy = MRI.getType(MI.getOperand(1).getReg());
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unsigned NarrowSize = NarrowTy.getSizeInBits();
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if (SrcTy.isScalar() && SrcTy.getSizeInBits() == 2 * NarrowSize) {
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auto UnmergeSrc = MIRBuilder.buildUnmerge(NarrowTy, MI.getOperand(1));
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auto LoCTPOP = MIRBuilder.buildCTPOP(NarrowTy, UnmergeSrc.getReg(0));
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auto HiCTPOP = MIRBuilder.buildCTPOP(NarrowTy, UnmergeSrc.getReg(1));
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auto Out = MIRBuilder.buildAdd(NarrowTy, HiCTPOP, LoCTPOP);
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MIRBuilder.buildZExt(MI.getOperand(0), Out);
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MI.eraseFromParent();
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return Legalized;
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}
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return UnableToLegalize;
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}
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LegalizerHelper::LegalizeResult
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LegalizerHelper::lowerBitCount(MachineInstr &MI, unsigned TypeIdx, LLT Ty) {
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unsigned Opc = MI.getOpcode();
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@ -4017,6 +4043,57 @@ LegalizerHelper::lowerBitCount(MachineInstr &MI, unsigned TypeIdx, LLT Ty) {
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MI.getOperand(1).setReg(MIBTmp.getReg(0));
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return Legalized;
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}
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case TargetOpcode::G_CTPOP: {
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unsigned Size = Ty.getSizeInBits();
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MachineIRBuilder &B = MIRBuilder;
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// Count set bits in blocks of 2 bits. Default approach would be
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// B2Count = { val & 0x55555555 } + { (val >> 1) & 0x55555555 }
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// We use following formula instead:
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// B2Count = val - { (val >> 1) & 0x55555555 }
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// since it gives same result in blocks of 2 with one instruction less.
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auto C_1 = B.buildConstant(Ty, 1);
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auto B2Set1LoTo1Hi = B.buildLShr(Ty, MI.getOperand(1).getReg(), C_1);
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APInt B2Mask1HiTo0 = APInt::getSplat(Size, APInt(8, 0x55));
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auto C_B2Mask1HiTo0 = B.buildConstant(Ty, B2Mask1HiTo0);
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auto B2Count1Hi = B.buildAnd(Ty, B2Set1LoTo1Hi, C_B2Mask1HiTo0);
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auto B2Count = B.buildSub(Ty, MI.getOperand(1).getReg(), B2Count1Hi);
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// In order to get count in blocks of 4 add values from adjacent block of 2.
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// B4Count = { B2Count & 0x33333333 } + { (B2Count >> 2) & 0x33333333 }
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auto C_2 = B.buildConstant(Ty, 2);
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auto B4Set2LoTo2Hi = B.buildLShr(Ty, B2Count, C_2);
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APInt B4Mask2HiTo0 = APInt::getSplat(Size, APInt(8, 0x33));
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auto C_B4Mask2HiTo0 = B.buildConstant(Ty, B4Mask2HiTo0);
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auto B4HiB2Count = B.buildAnd(Ty, B4Set2LoTo2Hi, C_B4Mask2HiTo0);
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auto B4LoB2Count = B.buildAnd(Ty, B2Count, C_B4Mask2HiTo0);
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auto B4Count = B.buildAdd(Ty, B4HiB2Count, B4LoB2Count);
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// For count in blocks of 8 bits we don't have to mask high 4 bits before
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// addition since count value sits in range {0,...,8} and 4 bits are enough
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// to hold such binary values. After addition high 4 bits still hold count
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// of set bits in high 4 bit block, set them to zero and get 8 bit result.
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// B8Count = { B4Count + (B4Count >> 4) } & 0x0F0F0F0F
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auto C_4 = B.buildConstant(Ty, 4);
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auto B8HiB4Count = B.buildLShr(Ty, B4Count, C_4);
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auto B8CountDirty4Hi = B.buildAdd(Ty, B8HiB4Count, B4Count);
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APInt B8Mask4HiTo0 = APInt::getSplat(Size, APInt(8, 0x0F));
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auto C_B8Mask4HiTo0 = B.buildConstant(Ty, B8Mask4HiTo0);
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auto B8Count = B.buildAnd(Ty, B8CountDirty4Hi, C_B8Mask4HiTo0);
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assert(Size<=128 && "Scalar size is too large for CTPOP lower algorithm");
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// 8 bits can hold CTPOP result of 128 bit int or smaller. Mul with this
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// bitmask will set 8 msb in ResTmp to sum of all B8Counts in 8 bit blocks.
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auto MulMask = B.buildConstant(Ty, APInt::getSplat(Size, APInt(8, 0x01)));
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auto ResTmp = B.buildMul(Ty, B8Count, MulMask);
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// Shift count result from 8 high bits to low bits.
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auto C_SizeM8 = B.buildConstant(Ty, Size - 8);
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B.buildLShr(MI.getOperand(0).getReg(), ResTmp, C_SizeM8);
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MI.eraseFromParent();
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return Legalized;
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}
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}
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}
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@ -214,6 +214,10 @@ MipsLegalizerInfo::MipsLegalizerInfo(const MipsSubtarget &ST) {
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getActionDefinitionsBuilder(G_CTTZ_ZERO_UNDEF)
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.lowerFor({{s32, s32}, {s64, s64}});
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getActionDefinitionsBuilder(G_CTPOP)
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.lowerFor({{s32, s32}})
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.clampScalar(1, s32, s32);
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// FP instructions
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getActionDefinitionsBuilder(G_FCONSTANT)
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.legalFor({s32, s64});
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102
test/CodeGen/Mips/GlobalISel/legalizer/ctpop.mir
Normal file
102
test/CodeGen/Mips/GlobalISel/legalizer/ctpop.mir
Normal file
@ -0,0 +1,102 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
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---
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name: ctpop_i32
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0
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; MIPS32-LABEL: name: ctpop_i32
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; MIPS32: liveins: $a0
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; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
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; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)
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; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1431655765
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; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[LSHR]], [[C1]]
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; MIPS32: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY]], [[AND]]
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; MIPS32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
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; MIPS32: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[SUB]], [[C2]](s32)
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; MIPS32: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 858993459
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; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[LSHR1]], [[C3]]
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; MIPS32: [[AND2:%[0-9]+]]:_(s32) = G_AND [[SUB]], [[C3]]
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; MIPS32: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[AND1]], [[AND2]]
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; MIPS32: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
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; MIPS32: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[ADD]], [[C4]](s32)
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; MIPS32: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[LSHR2]], [[ADD]]
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; MIPS32: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 252645135
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; MIPS32: [[AND3:%[0-9]+]]:_(s32) = G_AND [[ADD1]], [[C5]]
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; MIPS32: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 16843009
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; MIPS32: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[AND3]], [[C6]]
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; MIPS32: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
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; MIPS32: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[MUL]], [[C7]](s32)
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; MIPS32: $v0 = COPY [[LSHR3]](s32)
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; MIPS32: RetRA implicit $v0
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%0:_(s32) = COPY $a0
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%1:_(s32) = G_CTPOP %0(s32)
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$v0 = COPY %1(s32)
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RetRA implicit $v0
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...
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---
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name: ctpop_i64
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: ctpop_i64
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
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; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)
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; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1431655765
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; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[LSHR]], [[C1]]
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; MIPS32: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY]], [[AND]]
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; MIPS32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
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; MIPS32: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[SUB]], [[C2]](s32)
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; MIPS32: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 858993459
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; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[LSHR1]], [[C3]]
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; MIPS32: [[AND2:%[0-9]+]]:_(s32) = G_AND [[SUB]], [[C3]]
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; MIPS32: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[AND1]], [[AND2]]
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; MIPS32: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
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; MIPS32: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[ADD]], [[C4]](s32)
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; MIPS32: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[LSHR2]], [[ADD]]
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; MIPS32: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 252645135
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; MIPS32: [[AND3:%[0-9]+]]:_(s32) = G_AND [[ADD1]], [[C5]]
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; MIPS32: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 16843009
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; MIPS32: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[AND3]], [[C6]]
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; MIPS32: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
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; MIPS32: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[MUL]], [[C7]](s32)
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; MIPS32: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32)
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; MIPS32: [[AND4:%[0-9]+]]:_(s32) = G_AND [[LSHR4]], [[C1]]
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; MIPS32: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[COPY1]], [[AND4]]
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; MIPS32: [[LSHR5:%[0-9]+]]:_(s32) = G_LSHR [[SUB1]], [[C2]](s32)
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; MIPS32: [[AND5:%[0-9]+]]:_(s32) = G_AND [[LSHR5]], [[C3]]
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; MIPS32: [[AND6:%[0-9]+]]:_(s32) = G_AND [[SUB1]], [[C3]]
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; MIPS32: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[AND5]], [[AND6]]
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; MIPS32: [[LSHR6:%[0-9]+]]:_(s32) = G_LSHR [[ADD2]], [[C4]](s32)
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; MIPS32: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[LSHR6]], [[ADD2]]
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; MIPS32: [[AND7:%[0-9]+]]:_(s32) = G_AND [[ADD3]], [[C5]]
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; MIPS32: [[MUL1:%[0-9]+]]:_(s32) = G_MUL [[AND7]], [[C6]]
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; MIPS32: [[LSHR7:%[0-9]+]]:_(s32) = G_LSHR [[MUL1]], [[C7]](s32)
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; MIPS32: [[ADD4:%[0-9]+]]:_(s32) = G_ADD [[LSHR7]], [[LSHR3]]
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; MIPS32: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; MIPS32: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[ADD4]](s32), [[C8]](s32)
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; MIPS32: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[MV]](s64)
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; MIPS32: $v0 = COPY [[UV]](s32)
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; MIPS32: $v1 = COPY [[UV1]](s32)
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; MIPS32: RetRA implicit $v0, implicit $v1
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%1:_(s32) = COPY $a0
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%2:_(s32) = COPY $a1
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%0:_(s64) = G_MERGE_VALUES %1(s32), %2(s32)
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%3:_(s64) = G_CTPOP %0(s64)
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%4:_(s32), %5:_(s32) = G_UNMERGE_VALUES %3(s64)
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$v0 = COPY %4(s32)
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$v1 = COPY %5(s32)
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RetRA implicit $v0, implicit $v1
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...
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79
test/CodeGen/Mips/GlobalISel/llvm-ir/ctpop.ll
Normal file
79
test/CodeGen/Mips/GlobalISel/llvm-ir/ctpop.ll
Normal file
@ -0,0 +1,79 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32
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define i32 @ctpop_i32(i32 %a) {
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; MIPS32-LABEL: ctpop_i32:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: srl $1, $4, 1
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; MIPS32-NEXT: lui $2, 21845
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; MIPS32-NEXT: ori $2, $2, 21845
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; MIPS32-NEXT: and $1, $1, $2
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; MIPS32-NEXT: subu $1, $4, $1
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; MIPS32-NEXT: srl $2, $1, 2
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; MIPS32-NEXT: lui $3, 13107
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; MIPS32-NEXT: ori $3, $3, 13107
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; MIPS32-NEXT: and $2, $2, $3
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; MIPS32-NEXT: and $1, $1, $3
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; MIPS32-NEXT: addu $1, $2, $1
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; MIPS32-NEXT: srl $2, $1, 4
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; MIPS32-NEXT: addu $1, $2, $1
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; MIPS32-NEXT: lui $2, 3855
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; MIPS32-NEXT: ori $2, $2, 3855
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; MIPS32-NEXT: and $1, $1, $2
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; MIPS32-NEXT: lui $2, 257
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; MIPS32-NEXT: ori $2, $2, 257
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; MIPS32-NEXT: mul $1, $1, $2
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; MIPS32-NEXT: srl $2, $1, 24
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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%0 = call i32 @llvm.ctpop.i32(i32 %a)
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ret i32 %0
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}
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declare i32 @llvm.ctpop.i32(i32)
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define i64 @ctpop_i64(i64 %a) {
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; MIPS32-LABEL: ctpop_i64:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: srl $1, $4, 1
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; MIPS32-NEXT: lui $2, 21845
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; MIPS32-NEXT: ori $2, $2, 21845
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; MIPS32-NEXT: and $1, $1, $2
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; MIPS32-NEXT: subu $1, $4, $1
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; MIPS32-NEXT: srl $3, $1, 2
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; MIPS32-NEXT: lui $4, 13107
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; MIPS32-NEXT: ori $4, $4, 13107
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; MIPS32-NEXT: and $3, $3, $4
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; MIPS32-NEXT: and $1, $1, $4
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; MIPS32-NEXT: addu $1, $3, $1
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; MIPS32-NEXT: srl $3, $1, 4
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; MIPS32-NEXT: addu $1, $3, $1
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; MIPS32-NEXT: lui $3, 3855
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; MIPS32-NEXT: ori $3, $3, 3855
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; MIPS32-NEXT: and $1, $1, $3
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; MIPS32-NEXT: lui $6, 257
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; MIPS32-NEXT: ori $6, $6, 257
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; MIPS32-NEXT: mul $1, $1, $6
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; MIPS32-NEXT: srl $1, $1, 24
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; MIPS32-NEXT: srl $7, $5, 1
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; MIPS32-NEXT: and $2, $7, $2
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; MIPS32-NEXT: subu $2, $5, $2
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; MIPS32-NEXT: srl $5, $2, 2
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; MIPS32-NEXT: and $5, $5, $4
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; MIPS32-NEXT: and $2, $2, $4
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; MIPS32-NEXT: addu $2, $5, $2
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; MIPS32-NEXT: srl $4, $2, 4
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; MIPS32-NEXT: addu $2, $4, $2
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; MIPS32-NEXT: and $2, $2, $3
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; MIPS32-NEXT: mul $2, $2, $6
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; MIPS32-NEXT: srl $2, $2, 24
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; MIPS32-NEXT: addu $2, $2, $1
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; MIPS32-NEXT: ori $3, $zero, 0
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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%0 = call i64 @llvm.ctpop.i64(i64 %a)
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ret i64 %0
|
||||
}
|
||||
declare i64 @llvm.ctpop.i64(i64)
|
||||
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Reference in New Issue
Block a user