RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-18 18:42:46 +02:00
Code Issues Projects Releases Wiki Activity

Allow strict subclasses of register classes, this way we can handle

Browse Source 
ARM instructions with:

foo GPR, rGPR

which happens a lot.

llvm-svn: 112025
This commit is contained in:
Eric Christopher 2010-08-25 04:58:56 +00:00
parent ff2830f285
commit 7637f43217
1 changed files with 3 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
utils/TableGen/FastISelEmitter.cpp
View File

@ -112,9 +112,10 @@ struct OperandsSignature {
if (!RC)
return false;
// For now, all the operands must have the same register class.
// For now, all the operands must have the same register class or be
// a strict subclass of the destination.
if (DstRC) {
if (DstRC != RC)
if (DstRC != RC && !DstRC->hasSubClass(RC))
return false;
} else
DstRC = RC;