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Fixed the encoding problems of the crc32 instructions. All had the Operand size
override prefix and only the r/m16 forms should have had that. Also for variant one, the AT&T syntax, added suffixes to all forms. Also added the missing 64-bit form for 'CRC32 r64, r/m8'. Plus added test cases for all forms and tweaked one test case to add the needed suffixes. llvm-svn: 98980
This commit is contained in:
Kevin Enderby
parent
42ef17e8b6
commit
766909ae3b
@ -892,7 +892,10 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse42_crc32_32 : GCCBuiltin<"__builtin_ia32_crc32si">,
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Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
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[IntrNoMem]>;
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def int_x86_sse42_crc32_64 : GCCBuiltin<"__builtin_ia32_crc32di">,
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def int_x86_sse42_crc64_8 :
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Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i8_ty],
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[IntrNoMem]>;
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def int_x86_sse42_crc64_64 : GCCBuiltin<"__builtin_ia32_crc32di">,
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Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty],
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[IntrNoMem]>;
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}
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@ -3823,54 +3823,65 @@ def : Pat<(v2i64 (X86pcmpgtq VR128:$src1, (memop addr:$src2))),
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let Constraints = "$src1 = $dst" in {
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def CRC32m8 : SS42FI<0xF0, MRMSrcMem, (outs GR32:$dst),
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(ins GR32:$src1, i8mem:$src2),
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"crc32 \t{$src2, $src1|$src1, $src2}",
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"crc32{b} \t{$src2, $src1|$src1, $src2}",
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[(set GR32:$dst,
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(int_x86_sse42_crc32_8 GR32:$src1,
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(load addr:$src2)))]>, OpSize;
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(load addr:$src2)))]>;
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def CRC32r8 : SS42FI<0xF0, MRMSrcReg, (outs GR32:$dst),
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(ins GR32:$src1, GR8:$src2),
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"crc32 \t{$src2, $src1|$src1, $src2}",
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"crc32{b} \t{$src2, $src1|$src1, $src2}",
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[(set GR32:$dst,
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(int_x86_sse42_crc32_8 GR32:$src1, GR8:$src2))]>,
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OpSize;
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(int_x86_sse42_crc32_8 GR32:$src1, GR8:$src2))]>;
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def CRC32m16 : SS42FI<0xF1, MRMSrcMem, (outs GR32:$dst),
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(ins GR32:$src1, i16mem:$src2),
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"crc32 \t{$src2, $src1|$src1, $src2}",
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"crc32{w} \t{$src2, $src1|$src1, $src2}",
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[(set GR32:$dst,
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(int_x86_sse42_crc32_16 GR32:$src1,
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(load addr:$src2)))]>,
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OpSize;
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def CRC32r16 : SS42FI<0xF1, MRMSrcReg, (outs GR32:$dst),
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(ins GR32:$src1, GR16:$src2),
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"crc32 \t{$src2, $src1|$src1, $src2}",
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"crc32{w} \t{$src2, $src1|$src1, $src2}",
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[(set GR32:$dst,
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(int_x86_sse42_crc32_16 GR32:$src1, GR16:$src2))]>,
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OpSize;
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def CRC32m32 : SS42FI<0xF1, MRMSrcMem, (outs GR32:$dst),
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(ins GR32:$src1, i32mem:$src2),
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"crc32 \t{$src2, $src1|$src1, $src2}",
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"crc32{l} \t{$src2, $src1|$src1, $src2}",
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[(set GR32:$dst,
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(int_x86_sse42_crc32_32 GR32:$src1,
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(load addr:$src2)))]>, OpSize;
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(load addr:$src2)))]>;
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def CRC32r32 : SS42FI<0xF1, MRMSrcReg, (outs GR32:$dst),
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(ins GR32:$src1, GR32:$src2),
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"crc32 \t{$src2, $src1|$src1, $src2}",
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"crc32{l} \t{$src2, $src1|$src1, $src2}",
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[(set GR32:$dst,
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(int_x86_sse42_crc32_32 GR32:$src1, GR32:$src2))]>,
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OpSize;
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def CRC64m64 : SS42FI<0xF0, MRMSrcMem, (outs GR64:$dst),
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(ins GR64:$src1, i64mem:$src2),
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"crc32 \t{$src2, $src1|$src1, $src2}",
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(int_x86_sse42_crc32_32 GR32:$src1, GR32:$src2))]>;
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def CRC64m8 : SS42FI<0xF0, MRMSrcMem, (outs GR64:$dst),
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(ins GR64:$src1, i8mem:$src2),
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"crc32{b} \t{$src2, $src1|$src1, $src2}",
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[(set GR64:$dst,
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(int_x86_sse42_crc32_64 GR64:$src1,
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(int_x86_sse42_crc64_8 GR64:$src1,
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(load addr:$src2)))]>,
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OpSize, REX_W;
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def CRC64r64 : SS42FI<0xF0, MRMSrcReg, (outs GR64:$dst),
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(ins GR64:$src1, GR64:$src2),
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"crc32 \t{$src2, $src1|$src1, $src2}",
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REX_W;
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def CRC64r8 : SS42FI<0xF0, MRMSrcReg, (outs GR64:$dst),
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(ins GR64:$src1, GR8:$src2),
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"crc32{b} \t{$src2, $src1|$src1, $src2}",
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[(set GR64:$dst,
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(int_x86_sse42_crc32_64 GR64:$src1, GR64:$src2))]>,
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OpSize, REX_W;
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(int_x86_sse42_crc64_8 GR64:$src1, GR8:$src2))]>,
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REX_W;
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def CRC64m64 : SS42FI<0xF1, MRMSrcMem, (outs GR64:$dst),
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(ins GR64:$src1, i64mem:$src2),
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"crc32{q} \t{$src2, $src1|$src1, $src2}",
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[(set GR64:$dst,
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(int_x86_sse42_crc64_64 GR64:$src1,
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(load addr:$src2)))]>,
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REX_W;
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def CRC64r64 : SS42FI<0xF1, MRMSrcReg, (outs GR64:$dst),
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(ins GR64:$src1, GR64:$src2),
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"crc32{q} \t{$src2, $src1|$src1, $src2}",
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[(set GR64:$dst,
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(int_x86_sse42_crc64_64 GR64:$src1, GR64:$src2))]>,
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REX_W;
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}
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// String/text processing instructions.
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@ -9,10 +9,10 @@ define i32 @crc32_8(i32 %a, i8 %b) nounwind {
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%tmp = call i32 @llvm.x86.sse42.crc32.8(i32 %a, i8 %b)
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ret i32 %tmp
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; X32: _crc32_8:
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; X32: crc32 8(%esp), %eax
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; X32: crc32b 8(%esp), %eax
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; X64: _crc32_8:
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; X64: crc32 %sil, %eax
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; X64: crc32b %sil, %eax
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}
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@ -20,10 +20,10 @@ define i32 @crc32_16(i32 %a, i16 %b) nounwind {
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%tmp = call i32 @llvm.x86.sse42.crc32.16(i32 %a, i16 %b)
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ret i32 %tmp
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; X32: _crc32_16:
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; X32: crc32 8(%esp), %eax
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; X32: crc32w 8(%esp), %eax
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; X64: _crc32_16:
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; X64: crc32 %si, %eax
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; X64: crc32w %si, %eax
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}
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@ -31,8 +31,8 @@ define i32 @crc32_32(i32 %a, i32 %b) nounwind {
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%tmp = call i32 @llvm.x86.sse42.crc32.32(i32 %a, i32 %b)
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ret i32 %tmp
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; X32: _crc32_32:
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; X32: crc32 8(%esp), %eax
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; X32: crc32l 8(%esp), %eax
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; X64: _crc32_32:
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; X64: crc32 %esi, %eax
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; X64: crc32l %esi, %eax
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}
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@ -7756,41 +7756,38 @@
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// CHECK: ptest %xmm5, %xmm5
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ptest %xmm5,%xmm5
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// CHECK: crc32 3735928559(%ebx,%ecx,8), %ecx
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crc32 0xdeadbeef(%ebx,%ecx,8),%ecx
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// CHECK: crc32b %bl, %eax
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crc32b %bl, %eax
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// CHECK: crc32 69, %ecx
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crc32 0x45,%ecx
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// CHECK: crc32b 4(%ebx), %eax
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crc32b 4(%ebx), %eax
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// CHECK: crc32 32493, %ecx
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crc32 0x7eed,%ecx
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// CHECK: crc32w %bx, %eax
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crc32w %bx, %eax
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// CHECK: crc32 3133065982, %ecx
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crc32 0xbabecafe,%ecx
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// CHECK: crc32w 4(%ebx), %eax
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crc32w 4(%ebx), %eax
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// CHECK: crc32 305419896, %ecx
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crc32 0x12345678,%ecx
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// CHECK: crc32l %ebx, %eax
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crc32l %ebx, %eax
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// CHECK: crc32 %ecx, %ecx
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crc32 %ecx,%ecx
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// CHECK: crc32l 4(%ebx), %eax
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crc32l 4(%ebx), %eax
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// CHECK: crc32 %ecx, %ecx
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crc32 %ecx,%ecx
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// CHECK: crc32l 3735928559(%ebx,%ecx,8), %ecx
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crc32l 0xdeadbeef(%ebx,%ecx,8),%ecx
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// CHECK: crc32 3735928559(%ebx,%ecx,8), %ecx
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crc32 0xdeadbeef(%ebx,%ecx,8),%ecx
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// CHECK: crc32l 69, %ecx
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crc32l 0x45,%ecx
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// CHECK: crc32 69, %ecx
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crc32 0x45,%ecx
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// CHECK: crc32l 32493, %ecx
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crc32l 0x7eed,%ecx
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// CHECK: crc32 32493, %ecx
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crc32 0x7eed,%ecx
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// CHECK: crc32l 3133065982, %ecx
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crc32l 0xbabecafe,%ecx
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// CHECK: crc32 3133065982, %ecx
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crc32 0xbabecafe,%ecx
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// CHECK: crc32 305419896, %ecx
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crc32 0x12345678,%ecx
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// CHECK: crc32l %ecx, %ecx
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crc32l %ecx,%ecx
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// CHECK: pcmpgtq 3735928559(%ebx,%ecx,8), %xmm5
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pcmpgtq 0xdeadbeef(%ebx,%ecx,8),%xmm5
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@ -9861,3 +9861,47 @@
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// CHECK: pcmpgtq %xmm5, %xmm5
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// CHECK: encoding: [0x66,0x0f,0x38,0x37,0xed]
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pcmpgtq %xmm5,%xmm5
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// CHECK: crc32b %bl, %eax
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// CHECK: encoding: [0xf2,0x0f,0x38,0xf0,0xc3]
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crc32b %bl, %eax
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// CHECK: crc32b 4(%ebx), %eax
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// CHECK: encoding: [0xf2,0x0f,0x38,0xf0,0x43,0x04]
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crc32b 4(%ebx), %eax
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// CHECK: crc32w %bx, %eax
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// CHECK: encoding: [0x66,0xf2,0x0f,0x38,0xf1,0xc3]
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crc32w %bx, %eax
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// CHECK: crc32w 4(%ebx), %eax
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// CHECK: encoding: [0x66,0xf2,0x0f,0x38,0xf1,0x43,0x04]
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crc32w 4(%ebx), %eax
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// CHECK: crc32l %ebx, %eax
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// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0xc3]
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crc32l %ebx, %eax
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// CHECK: crc32l 4(%ebx), %eax
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// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0x43,0x04]
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crc32l 4(%ebx), %eax
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// CHECK: crc32l 3735928559(%ebx,%ecx,8), %ecx
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// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0x8c,0xcb,0xef,0xbe,0xad,0xde]
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crc32l 0xdeadbeef(%ebx,%ecx,8),%ecx
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// CHECK: crc32l 69, %ecx
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// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0x0d,0x45,0x00,0x00,0x00]
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crc32l 0x45,%ecx
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// CHECK: crc32l 32493, %ecx
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// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0x0d,0xed,0x7e,0x00,0x00]
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crc32l 0x7eed,%ecx
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// CHECK: crc32l 3133065982, %ecx
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// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0x0d,0xfe,0xca,0xbe,0xba]
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crc32l 0xbabecafe,%ecx
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// CHECK: crc32l %ecx, %ecx
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// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0xc9]
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crc32l %ecx,%ecx
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73
test/MC/AsmParser/X86/x86_64-encoding.s
Normal file
73
test/MC/AsmParser/X86/x86_64-encoding.s
Normal file
@ -0,0 +1,73 @@
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// RUN: llvm-mc -triple x86_64-unknown-unknown --show-encoding %s | FileCheck %s
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// CHECK: crc32b %bl, %eax
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// CHECK: encoding: [0xf2,0x0f,0x38,0xf0,0xc3]
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crc32b %bl, %eax
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// CHECK: crc32b 4(%rbx), %eax
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// CHECK: encoding: [0xf2,0x0f,0x38,0xf0,0x43,0x04]
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crc32b 4(%rbx), %eax
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// CHECK: crc32w %bx, %eax
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// CHECK: encoding: [0x66,0xf2,0x0f,0x38,0xf1,0xc3]
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crc32w %bx, %eax
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// CHECK: crc32w 4(%rbx), %eax
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// CHECK: encoding: [0x66,0xf2,0x0f,0x38,0xf1,0x43,0x04]
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crc32w 4(%rbx), %eax
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// CHECK: crc32l %ebx, %eax
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// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0xc3]
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crc32l %ebx, %eax
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// CHECK: crc32l 4(%rbx), %eax
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// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0x43,0x04]
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crc32l 4(%rbx), %eax
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// CHECK: crc32l 3735928559(%rbx,%rcx,8), %ecx
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// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0x8c,0xcb,0xef,0xbe,0xad,0xde]
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crc32l 0xdeadbeef(%rbx,%rcx,8),%ecx
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// CHECK: crc32l 69, %ecx
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// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0x0c,0x25,0x45,0x00,0x00,0x00]
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crc32l 0x45,%ecx
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// CHECK: crc32l 32493, %ecx
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// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0x0c,0x25,0xed,0x7e,0x00,0x00]
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crc32l 0x7eed,%ecx
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// CHECK: crc32l 3133065982, %ecx
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// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0x0c,0x25,0xfe,0xca,0xbe,0xba]
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crc32l 0xbabecafe,%ecx
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// CHECK: crc32l %ecx, %ecx
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// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0xc9]
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crc32l %ecx,%ecx
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// CHECK: crc32b %r11b, %eax
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// CHECK: encoding: [0xf2,0x41,0x0f,0x38,0xf0,0xc3]
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crc32b %r11b, %eax
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// CHECK: crc32b 4(%rbx), %eax
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// CHECK: encoding: [0xf2,0x0f,0x38,0xf0,0x43,0x04]
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crc32b 4(%rbx), %eax
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// CHECK: crc32b %dil, %rax
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// CHECK: encoding: [0xf2,0x48,0x0f,0x38,0xf0,0xc7]
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crc32b %dil,%rax
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// CHECK: crc32b %r11b, %rax
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// CHECK: encoding: [0xf2,0x49,0x0f,0x38,0xf0,0xc3]
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crc32b %r11b,%rax
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// CHECK: crc32b 4(%rbx), %rax
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// CHECK: encoding: [0xf2,0x48,0x0f,0x38,0xf0,0x43,0x04]
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crc32b 4(%rbx), %rax
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// CHECK: crc32q %rbx, %rax
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// CHECK: encoding: [0xf2,0x48,0x0f,0x38,0xf1,0xc3]
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crc32q %rbx, %rax
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// CHECK: crc32q 4(%rbx), %rax
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// CHECK: encoding: [0xf2,0x48,0x0f,0x38,0xf1,0x43,0x04]
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crc32q 4(%rbx), %rax
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@ -549,3 +549,14 @@
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ptest 0xdeadbeef(%ebx,%ecx,8),%xmm5
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ptest %xmm5,%xmm5
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pcmpgtq %xmm5,%xmm5
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crc32b %bl, %eax
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crc32b 4(%ebx), %eax
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crc32w %bx, %eax
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crc32w 4(%ebx), %eax
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crc32l %ebx, %eax
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crc32l 4(%ebx), %eax
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crc32l 0xdeadbeef(%ebx,%ecx,8),%ecx
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crc32l 0x45,%ecx
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crc32l 0x7eed,%ecx
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crc32l 0xbabecafe,%ecx
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crc32l %ecx,%ecx
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