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Parse .gpdword and convert another llc -filetype=obj test.
llvm-svn: 205028
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053ac9c84d
commit
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@ -212,6 +212,7 @@ class MipsAsmParser : public MCTargetAsmParser {
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bool parseDataDirective(unsigned Size, SMLoc L);
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bool parseDirectiveGpWord();
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bool parseDirectiveGpdWord();
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MCSymbolRefExpr::VariantKind getVariantKind(StringRef Symbol);
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@ -2715,6 +2716,22 @@ bool MipsAsmParser::parseDirectiveGpWord() {
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return false;
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}
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/// parseDirectiveGpdWord
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/// ::= .gpdword local_sym
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bool MipsAsmParser::parseDirectiveGpdWord() {
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const MCExpr *Value;
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// EmitGPRel64Value requires an expression, so we are using base class
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// method to evaluate the expression.
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if (getParser().parseExpression(Value))
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return true;
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getParser().getStreamer().EmitGPRel64Value(Value);
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if (getLexer().isNot(AsmToken::EndOfStatement))
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return Error(getLexer().getLoc(), "unexpected token in directive");
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Parser.Lex(); // Eat EndOfStatement token.
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return false;
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}
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bool MipsAsmParser::parseDirectiveOption() {
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// Get the option token.
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AsmToken Tok = Parser.getTok();
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@ -2798,11 +2815,15 @@ bool MipsAsmParser::ParseDirective(AsmToken DirectiveID) {
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}
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if (IDVal == ".gpword") {
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// Ignore this directive for now.
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parseDirectiveGpWord();
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return false;
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}
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if (IDVal == ".gpdword") {
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parseDirectiveGpdWord();
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return false;
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}
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if (IDVal == ".word") {
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parseDataDirective(4, DirectiveID.getLoc());
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return false;
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@ -73,10 +73,10 @@ $tmp0:
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.section .rodata,"a",@progbits
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.align 3
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$JTI0_0:
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// .gpdword ($BB0_3)
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// .gpdword ($BB0_4)
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// .gpdword ($BB0_5)
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// .gpdword ($BB0_6)
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.gpdword ($BB0_3)
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.gpdword ($BB0_4)
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.gpdword ($BB0_5)
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.gpdword ($BB0_6)
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.text
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@ -1,40 +0,0 @@
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; RUN: llc -filetype=obj -march=mips64el -mcpu=mips64 %s -o - \
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; RUN: | llvm-readobj -r \
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; RUN: | FileCheck %s
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define i32 @test(i32 %c) nounwind {
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entry:
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switch i32 %c, label %sw.default [
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i32 0, label %sw.bb
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i32 1, label %sw.bb2
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i32 2, label %sw.bb5
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i32 3, label %sw.bb8
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]
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sw.bb:
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br label %return
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sw.bb2:
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br label %return
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sw.bb5:
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br label %return
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sw.bb8:
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br label %return
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sw.default:
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br label %return
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return:
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%retval.0 = phi i32 [ -1, %sw.default ], [ 7, %sw.bb8 ], [ 2, %sw.bb5 ], [ 3, %sw.bb2 ], [ 1, %sw.bb ]
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ret i32 %retval.0
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}
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; Check that the appropriate relocations were created.
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; R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
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; CHECK: Relocations [
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; CHECK: Section ({{[a-z0-9]+}}) .rela.rodata {
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; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
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; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
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; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
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; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
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; CHECK-NEXT: }
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; CHECK-NEXT: ]
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83
test/MC/Mips/elf-gprel-32-64.s
Normal file
83
test/MC/Mips/elf-gprel-32-64.s
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@ -0,0 +1,83 @@
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// RUN: llvm-mc -filetype=obj -triple=mips64el-pc-linux -mcpu=mips64 %s -o - \
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// RUN: | llvm-readobj -r \
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// RUN: | FileCheck %s
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// Check that the appropriate relocations were created.
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// R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
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// CHECK: Relocations [
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// CHECK: Section ({{[a-z0-9]+}}) .rela.rodata {
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// CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
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// CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
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// CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
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// CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
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// CHECK-NEXT: }
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// CHECK-NEXT: ]
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.text
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.abicalls
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.section .mdebug.abi64,"",@progbits
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.file "/home/espindola/llvm/llvm/test/MC/Mips/elf-gprel-32-64.ll"
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.text
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.globl test
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.align 3
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.type test,@function
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.set nomips16
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.ent test
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test: # @test
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.frame $sp,0,$ra
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.mask 0x00000000,0
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.fmask 0x00000000,0
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.set noreorder
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.set nomacro
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.set noat
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# BB#0: # %entry
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lui $1, %hi(%neg(%gp_rel(test)))
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daddu $2, $1, $25
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sltiu $1, $4, 4
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dsll $3, $4, 32
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bnez $1, $BB0_2
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nop
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$BB0_1: # %sw.default
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b $BB0_3
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addiu $2, $zero, -1
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$BB0_2: # %entry
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daddiu $1, $2, %lo(%neg(%gp_rel(test)))
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dsrl $3, $3, 32
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daddiu $4, $zero, 8
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dmult $3, $4
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mflo $3
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ld $4, %got_page($JTI0_0)($1)
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daddu $3, $3, $4
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ld $3, %got_ofst($JTI0_0)($3)
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daddu $1, $3, $1
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jr $1
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addiu $2, $zero, 1
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$BB0_3: # %return
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jr $ra
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nop
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$BB0_4: # %sw.bb2
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jr $ra
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addiu $2, $zero, 3
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$BB0_5: # %sw.bb5
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jr $ra
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addiu $2, $zero, 2
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$BB0_6: # %sw.bb8
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jr $ra
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addiu $2, $zero, 7
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.set at
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.set macro
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.set reorder
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.end test
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$tmp0:
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.size test, ($tmp0)-test
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.section .rodata,"a",@progbits
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.align 3
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$JTI0_0:
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.gpdword ($BB0_3)
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.gpdword ($BB0_4)
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.gpdword ($BB0_5)
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.gpdword ($BB0_6)
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.text
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