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[RISCV] Implement MC layer support for the tail pseudoinstruction

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Summary:
This patch implements MC support for tail psuedo instruction.
A follow-up patch implements the codegen support as well as handling of the indirect tail pseudo instruction.

Reviewers: asb, apazos

Reviewed By: asb

Subscribers: rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, llvm-commits

Differential Revision: https://reviews.llvm.org/D46221

llvm-svn: 332634
This commit is contained in:
Mandeep Singh Grang 2018-05-17 17:31:27 +00:00
parent ce5e352172
commit 77679be721
5 changed files with 73 additions and 3 deletions
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3
lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
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@ -943,7 +943,8 @@ bool RISCVAsmParser::ParseInstruction(ParseInstructionInfo &Info,
return false;
// Parse first operand
if (parseOperand(Operands, Name == "call"))
bool ForceImmediate = (Name == "call" || Name == "tail");
if (parseOperand(Operands, ForceImmediate))
return true;
// Parse until end of statement, consuming commas between operands

5
lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
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@ -97,7 +97,7 @@ void RISCVMCCodeEmitter::expandFunctionCall(const MCInst &MI, raw_ostream &OS,
const MCSubtargetInfo &STI) const {
MCInst TmpInst;
MCOperand Func = MI.getOperand(0);
unsigned Ra = RISCV::X1;
unsigned Ra = (MI.getOpcode() == RISCV::PseudoTAIL) ? RISCV::X6 : RISCV::X1;
uint32_t Binary;
assert(Func.isExpr() && "Expected expression");
@ -128,7 +128,8 @@ void RISCVMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
// Get byte count of instruction.
unsigned Size = Desc.getSize();
if (MI.getOpcode() == RISCV::PseudoCALL) {
if (MI.getOpcode() == RISCV::PseudoCALL ||
MI.getOpcode() == RISCV::PseudoTAIL) {
expandFunctionCall(MI, OS, Fixups, STI);
MCNumEmitted += 2;
return;

9
lib/Target/RISCV/RISCVInstrInfo.td
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@ -661,6 +661,15 @@ let isBarrier = 1, isReturn = 1, isTerminator = 1 in
def PseudoRET : Pseudo<(outs), (ins), [(RetFlag)]>,
PseudoInstExpansion<(JALR X0, X1, 0)>;
// PseudoTAIL is a pseudo instruction similar to PseudoCALL and will eventually
// expand to auipc and jalr while encoding.
// Define AsmString to print "tail" when compile with -S flag.
let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [X2],
hasSideEffects = 0, mayLoad = 0, mayStore = 0, isCodeGenOnly = 0 in
def PseudoTAIL : Pseudo<(outs), (ins bare_symbol:$dst), []> {
let AsmString = "tail\t$dst";
}
/// Loads
multiclass LdPat<PatFrag LoadOp, RVInst Inst> {

12
test/MC/RISCV/tail-call-invalid.s Normal file
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@ -0,0 +1,12 @@
# RUN: not llvm-mc -triple riscv32 < %s 2>&1 | FileCheck %s
# RUN: not llvm-mc -triple riscv64 < %s 2>&1 | FileCheck %s
tail 1234 # CHECK: :[[@LINE]]:6: error: operand must be a bare symbol name
tail %pcrel_hi(1234) # CHECK: :[[@LINE]]:6: error: operand must be a bare symbol name
tail %pcrel_lo(1234) # CHECK: :[[@LINE]]:6: error: operand must be a bare symbol name
tail %pcrel_hi(foo) # CHECK: :[[@LINE]]:6: error: operand must be a bare symbol name
tail %pcrel_lo(foo) # CHECK: :[[@LINE]]:6: error: operand must be a bare symbol name
tail %hi(1234) # CHECK: :[[@LINE]]:6: error: operand must be a bare symbol name
tail %lo(1234) # CHECK: :[[@LINE]]:6: error: operand must be a bare symbol name
tail %hi(foo) # CHECK: :[[@LINE]]:6: error: operand must be a bare symbol name
tail %lo(foo) # CHECK: :[[@LINE]]:6: error: operand must be a bare symbol name

47
test/MC/RISCV/tail-call.s Normal file
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@ -0,0 +1,47 @@
# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
# RUN: | llvm-objdump -d - | FileCheck -check-prefix=INSTR %s
# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
# RUN: | llvm-readobj -r | FileCheck -check-prefix=RELOC %s
# RUN: llvm-mc -triple riscv32 < %s -show-encoding \
# RUN: | FileCheck -check-prefix=FIXUP %s
# RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
# RUN: | llvm-objdump -d - | FileCheck -check-prefix=INSTR %s
# RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
# RUN: | llvm-readobj -r | FileCheck -check-prefix=RELOC %s
# RUN: llvm-mc -triple riscv64 < %s -show-encoding \
# RUN: | FileCheck -check-prefix=FIXUP %s
.long foo
tail foo
# RELOC: R_RISCV_CALL foo 0x0
# INSTR: auipc t1, 0
# INSTR: jalr t1
# FIXUP: fixup A - offset: 0, value: foo, kind:
tail bar
# RELOC: R_RISCV_CALL bar 0x0
# INSTR: auipc t1, 0
# INSTR: jalr t1
# FIXUP: fixup A - offset: 0, value: bar, kind:
# Ensure that tail calls to functions whose names coincide with register names
# work.
tail zero
# RELOC: R_RISCV_CALL zero 0x0
# INSTR: auipc t1, 0
# INSTR: jalr t1
# FIXUP: fixup A - offset: 0, value: zero, kind:
tail f1
# RELOC: R_RISCV_CALL f1 0x0
# INSTR: auipc t1, 0
# INSTR: jalr t1
# FIXUP: fixup A - offset: 0, value: f1, kind:
tail ra
# RELOC: R_RISCV_CALL ra 0x0
# INSTR: auipc t1, 0
# INSTR: jalr t1
# FIXUP: fixup A - offset: 0, value: ra, kind: