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Revert 292404 due to buildbot failures.
llvm-svn: 292407
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@ -138,7 +138,7 @@ private:
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// The operator on the top of the stack has higher precedence than the
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// new operator.
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unsigned ParenCount = 0;
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while (true) {
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while (1) {
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// Nothing to process.
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if (InfixOperatorStack.empty())
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break;
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@ -1823,7 +1823,7 @@ std::unique_ptr<X86Operand> X86AsmParser::ParseIntelOperand() {
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return ParseIntelBracExpression(/*SegReg=*/0, Start, /*ImmDisp=*/0, false,
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Size);
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const AsmToken &StartTok = Tok;
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AsmToken StartTok = Tok;
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IntelExprStateMachine SM(/*Imm=*/0, /*StopOnLBrac=*/true,
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/*AddImmPrefix=*/false);
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if (ParseIntelExpression(SM, End))
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@ -2374,7 +2374,7 @@ bool X86AsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
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Operands.push_back(X86Operand::CreateToken("*", consumeToken()));
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// Read the operands.
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while (true) {
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while(1) {
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if (std::unique_ptr<X86Operand> Op = ParseOperand()) {
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Operands.push_back(std::move(Op));
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if (HandleAVX512Operand(Operands, *Operands.back()))
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@ -25369,7 +25369,7 @@ X86TargetLowering::EmitLoweredTLSAddr(MachineInstr &MI,
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// inside MC, therefore without the two markers shrink-wrapping
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// may push the prologue/epilogue pass them.
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const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
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const DebugLoc &DL = MI.getDebugLoc();
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DebugLoc DL = MI.getDebugLoc();
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MachineFunction &MF = *BB->getParent();
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// Emit CALLSEQ_START right before the instruction.
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@ -34624,7 +34624,7 @@ void X86TargetLowering::LowerAsmOperandForConstraint(SDValue Op,
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int64_t Offset = 0;
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// Match either (GA), (GA+C), (GA+C1+C2), etc.
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while (true) {
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while (1) {
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if ((GA = dyn_cast<GlobalAddressSDNode>(Op))) {
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Offset += GA->getOffset();
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break;
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