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Allocate fewer registers and tighten up alignment restrictions.

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llvm-svn: 17929
This commit is contained in:
Brian Gaeke 2004-11-18 00:25:20 +00:00
parent cc4074987b
commit 77ddfa2495
2 changed files with 12 additions and 5 deletions
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15
lib/Target/SparcV8/SparcV8RegisterInfo.td
View File

@ -25,13 +25,20 @@ include "../SparcRegisterInfo.td"
//
def IntRegs : RegisterClass<i32, 32, [L0, L1, L2, L3, L4, L5, L6, L7,
I0, I1, I2, I3, I4, I5,
G1, G2, G3, G4, G5, G6, G7,
G1,
O0, O1, O2, O3, O4, O5, O7,
// Non-allocatable regs
O6, I6, I7, G0]> {
// Non-allocatable regs:
G2, G3, G4, // FIXME: OK for use only in
// applications, not libraries.
O6, // stack ptr
I6, // frame ptr
I7, // return address
G0, // constant zero
G5, G6, G7 // reserved for kernel
]> {
let Methods = [{
iterator allocation_order_end(MachineFunction &MF) const {
return end()-4; // Don't allocate special registers
return end()-10; // Don't allocate special registers
}
}];
}

2
lib/Target/SparcV8/SparcV8TargetMachine.cpp
View File

@ -31,7 +31,7 @@ namespace {
///
SparcV8TargetMachine::SparcV8TargetMachine(const Module &M,
IntrinsicLowering *IL)
: TargetMachine("SparcV8", IL, false, 4, 4, 8, 4, 8),
: TargetMachine("SparcV8", IL, false, 4, 4, 8, 4, 8, 4, 4, 4, 4),
FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0), JITInfo(*this) {
}