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https://github.com/RPCS3/llvm-mirror.git
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Factor out the code for verifying the work of the scheduler,
extend it a bit, and make use of it in all schedulers, to ensure consistent checking. llvm-svn: 59689
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parent
20dec363b1
commit
77e3f07d4b
@ -96,7 +96,7 @@ namespace llvm {
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Latency(0), NumPreds(0), NumSuccs(0), NumPredsLeft(0), NumSuccsLeft(0),
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Latency(0), NumPreds(0), NumSuccs(0), NumPredsLeft(0), NumSuccsLeft(0),
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isTwoAddress(false), isCommutable(false), hasPhysRegDefs(false),
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isTwoAddress(false), isCommutable(false), hasPhysRegDefs(false),
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isPending(false), isAvailable(false), isScheduled(false),
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isPending(false), isAvailable(false), isScheduled(false),
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CycleBound(0), Cycle(0), Depth(0), Height(0),
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CycleBound(0), Cycle(~0u), Depth(0), Height(0),
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CopyDstRC(NULL), CopySrcRC(NULL) {}
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CopyDstRC(NULL), CopySrcRC(NULL) {}
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/// SUnit - Construct an SUnit for post-regalloc scheduling to represent
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/// SUnit - Construct an SUnit for post-regalloc scheduling to represent
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@ -106,7 +106,7 @@ namespace llvm {
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Latency(0), NumPreds(0), NumSuccs(0), NumPredsLeft(0), NumSuccsLeft(0),
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Latency(0), NumPreds(0), NumSuccs(0), NumPredsLeft(0), NumSuccsLeft(0),
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isTwoAddress(false), isCommutable(false), hasPhysRegDefs(false),
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isTwoAddress(false), isCommutable(false), hasPhysRegDefs(false),
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isPending(false), isAvailable(false), isScheduled(false),
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isPending(false), isAvailable(false), isScheduled(false),
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CycleBound(0), Cycle(0), Depth(0), Height(0),
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CycleBound(0), Cycle(~0u), Depth(0), Height(0),
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CopyDstRC(NULL), CopySrcRC(NULL) {}
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CopyDstRC(NULL), CopySrcRC(NULL) {}
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/// setNode - Assign the representative SDNode for this SUnit.
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/// setNode - Assign the representative SDNode for this SUnit.
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@ -308,6 +308,12 @@ namespace llvm {
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/// the ScheduleDAG.
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/// the ScheduleDAG.
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virtual void addCustomGraphFeatures(GraphWriter<ScheduleDAG*> &GW) const {}
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virtual void addCustomGraphFeatures(GraphWriter<ScheduleDAG*> &GW) const {}
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#ifndef NDEBUG
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/// VerifySchedule - Verify that all SUnits were scheduled and that
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/// their state is consistent.
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void VerifySchedule(bool isBottomUp);
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#endif
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protected:
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protected:
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void AddMemOperand(MachineInstr *MI, const MachineMemOperand &MO);
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void AddMemOperand(MachineInstr *MI, const MachineMemOperand &MO);
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@ -229,18 +229,7 @@ void SchedulePostRATDList::ListScheduleTopDown() {
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}
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}
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#ifndef NDEBUG
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#ifndef NDEBUG
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// Verify that all SUnits were scheduled.
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VerifySchedule(/*isBottomUp=*/false);
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bool AnyNotSched = false;
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for (unsigned i = 0, e = SUnits.size(); i != e; ++i) {
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if (SUnits[i].NumPredsLeft != 0) {
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if (!AnyNotSched)
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cerr << "*** List scheduling failed! ***\n";
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SUnits[i].dump(this);
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cerr << "has not been scheduled!\n";
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AnyNotSched = true;
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}
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}
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assert(!AnyNotSched);
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#endif
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#endif
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}
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}
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@ -208,3 +208,57 @@ void SUnit::dumpAll(const ScheduleDAG *G) const {
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}
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}
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cerr << "\n";
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cerr << "\n";
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}
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}
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#ifndef NDEBUG
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/// VerifySchedule - Verify that all SUnits were scheduled and that
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/// their state is consistent.
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///
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void ScheduleDAG::VerifySchedule(bool isBottomUp) {
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bool AnyNotSched = false;
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unsigned DeadNodes = 0;
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unsigned Noops = 0;
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for (unsigned i = 0, e = SUnits.size(); i != e; ++i) {
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if (!SUnits[i].isScheduled) {
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if (SUnits[i].NumPreds == 0 && SUnits[i].NumSuccs == 0) {
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++DeadNodes;
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continue;
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}
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if (!AnyNotSched)
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cerr << "*** Scheduling failed! ***\n";
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SUnits[i].dump(this);
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cerr << "has not been scheduled!\n";
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AnyNotSched = true;
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}
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if (SUnits[i].isScheduled && SUnits[i].Cycle > (unsigned)INT_MAX) {
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if (!AnyNotSched)
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cerr << "*** Scheduling failed! ***\n";
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SUnits[i].dump(this);
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cerr << "has an unexpected Cycle value!\n";
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AnyNotSched = true;
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}
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if (isBottomUp) {
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if (SUnits[i].NumSuccsLeft != 0) {
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if (!AnyNotSched)
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cerr << "*** Scheduling failed! ***\n";
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SUnits[i].dump(this);
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cerr << "has successors left!\n";
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AnyNotSched = true;
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}
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} else {
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if (SUnits[i].NumPredsLeft != 0) {
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if (!AnyNotSched)
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cerr << "*** Scheduling failed! ***\n";
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SUnits[i].dump(this);
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cerr << "has predecessors left!\n";
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AnyNotSched = true;
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}
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}
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}
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for (unsigned i = 0, e = Sequence.size(); i != e; ++i)
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if (!Sequence[i])
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++Noops;
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assert(!AnyNotSched);
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assert(Sequence.size() + DeadNodes - Noops == SUnits.size() &&
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"The number of nodes scheduled doesn't match the expected number!");
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}
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#endif
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@ -260,18 +260,7 @@ void ScheduleDAGList::ListScheduleTopDown() {
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}
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}
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#ifndef NDEBUG
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#ifndef NDEBUG
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// Verify that all SUnits were scheduled.
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VerifySchedule(/*isBottomUp=*/false);
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bool AnyNotSched = false;
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for (unsigned i = 0, e = SUnits.size(); i != e; ++i) {
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if (SUnits[i].NumPredsLeft != 0) {
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if (!AnyNotSched)
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cerr << "*** List scheduling failed! ***\n";
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SUnits[i].dump(this);
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cerr << "has not been scheduled!\n";
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AnyNotSched = true;
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}
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}
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assert(!AnyNotSched);
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#endif
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#endif
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}
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}
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@ -1069,38 +1069,8 @@ void ScheduleDAGRRList::ListScheduleBottomUp() {
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// Reverse the order if it is bottom up.
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// Reverse the order if it is bottom up.
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std::reverse(Sequence.begin(), Sequence.end());
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std::reverse(Sequence.begin(), Sequence.end());
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#ifndef NDEBUG
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#ifndef NDEBUG
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// Verify that all SUnits were scheduled.
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VerifySchedule(isBottomUp);
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bool AnyNotSched = false;
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unsigned DeadNodes = 0;
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unsigned Noops = 0;
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for (unsigned i = 0, e = SUnits.size(); i != e; ++i) {
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if (!SUnits[i].isScheduled) {
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if (SUnits[i].NumPreds == 0 && SUnits[i].NumSuccs == 0) {
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++DeadNodes;
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continue;
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}
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if (!AnyNotSched)
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cerr << "*** List scheduling failed! ***\n";
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SUnits[i].dump(this);
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cerr << "has not been scheduled!\n";
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AnyNotSched = true;
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}
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if (SUnits[i].NumSuccsLeft != 0) {
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if (!AnyNotSched)
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cerr << "*** List scheduling failed! ***\n";
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SUnits[i].dump(this);
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cerr << "has successors left!\n";
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AnyNotSched = true;
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}
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}
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for (unsigned i = 0, e = Sequence.size(); i != e; ++i)
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if (!Sequence[i])
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++Noops;
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assert(!AnyNotSched);
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assert(Sequence.size() + DeadNodes - Noops == SUnits.size() &&
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"The number of nodes scheduled doesn't match the expected number!");
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#endif
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#endif
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}
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}
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@ -1197,43 +1167,12 @@ void ScheduleDAGRRList::ListScheduleTopDown() {
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++CurCycle;
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++CurCycle;
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}
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}
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#ifndef NDEBUG
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#ifndef NDEBUG
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// Verify that all SUnits were scheduled.
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VerifySchedule(isBottomUp);
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bool AnyNotSched = false;
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unsigned DeadNodes = 0;
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unsigned Noops = 0;
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for (unsigned i = 0, e = SUnits.size(); i != e; ++i) {
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if (!SUnits[i].isScheduled) {
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if (SUnits[i].NumPreds == 0 && SUnits[i].NumSuccs == 0) {
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++DeadNodes;
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continue;
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}
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if (!AnyNotSched)
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cerr << "*** List scheduling failed! ***\n";
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SUnits[i].dump(this);
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cerr << "has not been scheduled!\n";
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AnyNotSched = true;
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}
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if (SUnits[i].NumPredsLeft != 0) {
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if (!AnyNotSched)
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cerr << "*** List scheduling failed! ***\n";
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SUnits[i].dump(this);
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cerr << "has predecessors left!\n";
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AnyNotSched = true;
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}
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}
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for (unsigned i = 0, e = Sequence.size(); i != e; ++i)
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if (!Sequence[i])
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++Noops;
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assert(!AnyNotSched);
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assert(Sequence.size() + DeadNodes - Noops == SUnits.size() &&
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"The number of nodes scheduled doesn't match the expected number!");
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#endif
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#endif
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}
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}
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// RegReductionPriorityQueue Implementation
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// RegReductionPriorityQueue Implementation
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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