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R600/SI: Re-order MUBUF operands to match asm strings.
llvm-svn: 231797
This commit is contained in:
Tom Stellard
parent
f486efe507
commit
78a9d058b0
@ -1863,10 +1863,10 @@ void SIInstrInfo::legalizeOperands(MachineInstr *MI) const {
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MachineInstr *Addr64 =
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BuildMI(MBB, MI, MI->getDebugLoc(), get(Addr64Opcode))
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.addOperand(*VData)
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.addOperand(*SRsrc)
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.addReg(AMDGPU::NoRegister) // Dummy value for vaddr.
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// This will be replaced later
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// with the new value of vaddr.
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.addOperand(*SRsrc)
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.addOperand(*SOffset)
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.addOperand(*Offset)
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.addImm(0) // glc
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@ -2051,11 +2051,10 @@ void SIInstrInfo::moveSMRDToVALU(MachineInstr *MI, MachineRegisterInfo &MRI) con
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.addImm(AMDGPU::sub3);
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MI->setDesc(get(NewOpcode));
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if (MI->getOperand(2).isReg()) {
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MI->getOperand(2).setReg(MI->getOperand(1).getReg());
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MI->getOperand(2).setReg(SRsrc);
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} else {
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MI->getOperand(2).ChangeToRegister(MI->getOperand(1).getReg(), false);
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MI->getOperand(2).ChangeToRegister(SRsrc, false);
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}
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MI->getOperand(1).setReg(SRsrc);
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MI->addOperand(*MBB->getParent(), MachineOperand::CreateImm(0));
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MI->addOperand(*MBB->getParent(), MachineOperand::CreateImm(ImmOffset));
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MI->addOperand(*MBB->getParent(), MachineOperand::CreateImm(0)); // glc
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@ -1911,7 +1911,7 @@ multiclass MUBUF_Load_Helper <mubuf op, string name, RegisterClass regClass,
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let offen = 1, idxen = 0 in {
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defm _OFFEN : MUBUF_m <op, name#"_offen", (outs regClass:$vdata),
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(ins SReg_128:$srsrc, VGPR_32:$vaddr,
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(ins VGPR_32:$vaddr, SReg_128:$srsrc,
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SCSrc_32:$soffset, mbuf_offset:$offset, glc:$glc, slc:$slc,
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tfe:$tfe),
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name#" $vdata, $vaddr, $srsrc, $soffset offen"#"$offset"#"$glc"#"$slc"#"$tfe", []>;
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@ -1919,7 +1919,7 @@ multiclass MUBUF_Load_Helper <mubuf op, string name, RegisterClass regClass,
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let offen = 0, idxen = 1 in {
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defm _IDXEN : MUBUF_m <op, name#"_idxen", (outs regClass:$vdata),
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(ins SReg_128:$srsrc, VGPR_32:$vaddr,
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(ins VGPR_32:$vaddr, SReg_128:$srsrc,
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SCSrc_32:$soffset, mbuf_offset:$offset, glc:$glc,
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slc:$slc, tfe:$tfe),
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name#" $vdata, $vaddr, $srsrc, $soffset idxen"#"$offset"#"$glc"#"$slc"#"$tfe", []>;
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@ -1927,14 +1927,14 @@ multiclass MUBUF_Load_Helper <mubuf op, string name, RegisterClass regClass,
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let offen = 1, idxen = 1 in {
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defm _BOTHEN : MUBUF_m <op, name#"_bothen", (outs regClass:$vdata),
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(ins SReg_128:$srsrc, VReg_64:$vaddr, SCSrc_32:$soffset,
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(ins VReg_64:$vaddr, SReg_128:$srsrc, SCSrc_32:$soffset,
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mbuf_offset:$offset, glc:$glc, slc:$slc, tfe:$tfe),
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name#" $vdata, $vaddr, $srsrc, $soffset idxen offen"#"$offset"#"$glc"#"$slc"#"$tfe", []>;
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}
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let offen = 0, idxen = 0 in {
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defm _ADDR64 : MUBUFAddr64_m <op, name#"_addr64", (outs regClass:$vdata),
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(ins SReg_128:$srsrc, VReg_64:$vaddr,
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(ins VReg_64:$vaddr, SReg_128:$srsrc,
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SCSrc_32:$soffset, mbuf_offset:$offset,
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glc:$glc, slc:$slc, tfe:$tfe),
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name#" $vdata, $vaddr, $srsrc, $soffset addr64"#"$offset"#
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@ -1951,7 +1951,7 @@ multiclass MUBUF_Store_Helper <mubuf op, string name, RegisterClass vdataClass,
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ValueType store_vt = i32, SDPatternOperator st = null_frag> {
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let mayLoad = 0, mayStore = 1 in {
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defm : MUBUF_m <op, name, (outs),
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(ins vdataClass:$vdata, SReg_128:$srsrc, VGPR_32:$vaddr, SCSrc_32:$soffset,
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(ins vdataClass:$vdata, VGPR_32:$vaddr, SReg_128:$srsrc, SCSrc_32:$soffset,
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mbuf_offset:$offset, offen:$offen, idxen:$idxen, glc:$glc, slc:$slc,
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tfe:$tfe),
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name#" $vdata, $vaddr, $srsrc, $soffset"#"$offen"#"$idxen"#"$offset"#
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@ -1968,7 +1968,7 @@ multiclass MUBUF_Store_Helper <mubuf op, string name, RegisterClass vdataClass,
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let offen = 1, idxen = 0 in {
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defm _OFFEN : MUBUF_m <op, name#"_offen", (outs),
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(ins vdataClass:$vdata, SReg_128:$srsrc, VGPR_32:$vaddr,
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(ins vdataClass:$vdata, VGPR_32:$vaddr, SReg_128:$srsrc,
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SCSrc_32:$soffset, mbuf_offset:$offset, glc:$glc,
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slc:$slc, tfe:$tfe),
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name#" $vdata, $vaddr, $srsrc, $soffset offen"#"$offset"#
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@ -1977,8 +1977,8 @@ multiclass MUBUF_Store_Helper <mubuf op, string name, RegisterClass vdataClass,
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let offen = 0, idxen = 0 in {
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defm _ADDR64 : MUBUFAddr64_m <op, name#"_addr64", (outs),
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(ins vdataClass:$vdata, SReg_128:$srsrc,
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VReg_64:$vaddr, SCSrc_32:$soffset,
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(ins vdataClass:$vdata, VReg_64:$vaddr, SReg_128:$srsrc,
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SCSrc_32:$soffset,
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mbuf_offset:$offset, glc:$glc, slc:$slc,
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tfe:$tfe),
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name#" $vdata, $vaddr, $srsrc, $soffset addr64"#
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@ -2118,7 +2118,7 @@ def : Pat <
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/* int_SI_vs_load_input */
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def : Pat<
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(SIload_input v4i32:$tlst, imm:$attr_offset, i32:$buf_idx_vgpr),
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(BUFFER_LOAD_FORMAT_XYZW_IDXEN $tlst, $buf_idx_vgpr, 0, imm:$attr_offset, 0, 0, 0)
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(BUFFER_LOAD_FORMAT_XYZW_IDXEN $buf_idx_vgpr, $tlst, 0, imm:$attr_offset, 0, 0, 0)
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>;
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/* int_SI_export */
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@ -2812,7 +2812,7 @@ def : Ext32Pat <anyext>;
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// Offset in an 32Bit VGPR
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def : Pat <
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(SIload_constant v4i32:$sbase, i32:$voff),
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(BUFFER_LOAD_DWORD_OFFEN $sbase, $voff, 0, 0, 0, 0, 0)
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(BUFFER_LOAD_DWORD_OFFEN $voff, $sbase, 0, 0, 0, 0, 0)
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>;
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// The multiplication scales from [0,1] to the unsigned integer range
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@ -2974,7 +2974,7 @@ multiclass MUBUFLoad_Pattern <MUBUF Instr_ADDR64, ValueType vt,
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def : Pat <
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(vt (constant_ld (MUBUFAddr64 v4i32:$srsrc, i64:$vaddr, i32:$soffset,
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i16:$offset, i1:$glc, i1:$slc, i1:$tfe))),
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(Instr_ADDR64 $srsrc, $vaddr, $soffset, $offset, $glc, $slc, $tfe)
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(Instr_ADDR64 $vaddr, $srsrc, $soffset, $offset, $glc, $slc, $tfe)
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>;
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}
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@ -2991,7 +2991,7 @@ defm : MUBUFLoad_Pattern <BUFFER_LOAD_DWORDX4_ADDR64, v4i32, constant_load>;
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class MUBUFScratchLoadPat <MUBUF Instr, ValueType vt, PatFrag ld> : Pat <
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(vt (ld (MUBUFScratch v4i32:$srsrc, i32:$vaddr,
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i32:$soffset, u16imm:$offset))),
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(Instr $srsrc, $vaddr, $soffset, $offset, 0, 0, 0)
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(Instr $vaddr, $srsrc, $soffset, $offset, 0, 0, 0)
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>;
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def : MUBUFScratchLoadPat <BUFFER_LOAD_SBYTE_OFFEN, i32, sextloadi8_private>;
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@ -3018,7 +3018,7 @@ multiclass MUBUF_Load_Dword <ValueType vt, MUBUF offset, MUBUF offen, MUBUF idxe
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(vt (int_SI_buffer_load_dword v4i32:$rsrc, i32:$vaddr, i32:$soffset,
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imm:$offset, 1, 0, imm:$glc, imm:$slc,
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imm:$tfe)),
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(offen $rsrc, $vaddr, $soffset, (as_i16imm $offset), (as_i1imm $glc), (as_i1imm $slc),
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(offen $vaddr, $rsrc, $soffset, (as_i16imm $offset), (as_i1imm $glc), (as_i1imm $slc),
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(as_i1imm $tfe))
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>;
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@ -3026,7 +3026,7 @@ multiclass MUBUF_Load_Dword <ValueType vt, MUBUF offset, MUBUF offen, MUBUF idxe
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(vt (int_SI_buffer_load_dword v4i32:$rsrc, i32:$vaddr, i32:$soffset,
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imm:$offset, 0, 1, imm:$glc, imm:$slc,
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imm:$tfe)),
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(idxen $rsrc, $vaddr, $soffset, (as_i16imm $offset), (as_i1imm $glc),
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(idxen $vaddr, $rsrc, $soffset, (as_i16imm $offset), (as_i1imm $glc),
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(as_i1imm $slc), (as_i1imm $tfe))
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>;
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@ -3034,7 +3034,7 @@ multiclass MUBUF_Load_Dword <ValueType vt, MUBUF offset, MUBUF offen, MUBUF idxe
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(vt (int_SI_buffer_load_dword v4i32:$rsrc, v2i32:$vaddr, i32:$soffset,
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imm:$offset, 1, 1, imm:$glc, imm:$slc,
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imm:$tfe)),
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(bothen $rsrc, $vaddr, $soffset, (as_i16imm $offset), (as_i1imm $glc), (as_i1imm $slc),
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(bothen $vaddr, $rsrc, $soffset, (as_i16imm $offset), (as_i1imm $glc), (as_i1imm $slc),
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(as_i1imm $tfe))
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>;
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}
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@ -3049,7 +3049,7 @@ defm : MUBUF_Load_Dword <v4i32, BUFFER_LOAD_DWORDX4_OFFSET, BUFFER_LOAD_DWORDX4_
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class MUBUFScratchStorePat <MUBUF Instr, ValueType vt, PatFrag st> : Pat <
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(st vt:$value, (MUBUFScratch v4i32:$srsrc, i32:$vaddr, i32:$soffset,
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u16imm:$offset)),
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(Instr $value, $srsrc, $vaddr, $soffset, $offset, 0, 0, 0)
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(Instr $value, $vaddr, $srsrc, $soffset, $offset, 0, 0, 0)
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>;
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def : MUBUFScratchStorePat <BUFFER_STORE_BYTE_OFFEN, i32, truncstorei8_private>;
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