diff --git a/include/llvm/CodeGen/MachineFrameInfo.h b/include/llvm/CodeGen/MachineFrameInfo.h index 03811bc5145..cdba5ef7656 100644 --- a/include/llvm/CodeGen/MachineFrameInfo.h +++ b/include/llvm/CodeGen/MachineFrameInfo.h @@ -462,10 +462,10 @@ public: /// Return the alignment of the specified stack object. /// FIXME: Remove this function once transition to Align is over. - unsigned getObjectAlignment(int ObjectIdx) const { - assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() && - "Invalid Object Idx!"); - return Objects[ObjectIdx + NumFixedObjects].Alignment.value(); + LLVM_ATTRIBUTE_DEPRECATED(inline unsigned getObjectAlignment(int ObjectIdx) + const, + "Use getObjectAlign instead") { + return getObjectAlign(ObjectIdx).value(); } /// Return the alignment of the specified stack object. diff --git a/lib/CodeGen/GlobalISel/GISelKnownBits.cpp b/lib/CodeGen/GlobalISel/GISelKnownBits.cpp index 213af320531..75487075cb7 100644 --- a/lib/CodeGen/GlobalISel/GISelKnownBits.cpp +++ b/lib/CodeGen/GlobalISel/GISelKnownBits.cpp @@ -34,7 +34,7 @@ GISelKnownBits::GISelKnownBits(MachineFunction &MF, unsigned MaxDepth) Align GISelKnownBits::inferAlignmentForFrameIdx(int FrameIdx, int Offset, const MachineFunction &MF) { const MachineFrameInfo &MFI = MF.getFrameInfo(); - return commonAlignment(Align(MFI.getObjectAlignment(FrameIdx)), Offset); + return commonAlignment(MFI.getObjectAlign(FrameIdx), Offset); // TODO: How to handle cases with Base + Offset? } diff --git a/lib/CodeGen/LocalStackSlotAllocation.cpp b/lib/CodeGen/LocalStackSlotAllocation.cpp index 5022726dc70..6c5ef0255a0 100644 --- a/lib/CodeGen/LocalStackSlotAllocation.cpp +++ b/lib/CodeGen/LocalStackSlotAllocation.cpp @@ -79,11 +79,11 @@ namespace { using StackObjSet = SmallSetVector; void AdjustStackOffset(MachineFrameInfo &MFI, int FrameIdx, int64_t &Offset, - bool StackGrowsDown, unsigned &MaxAlign); + bool StackGrowsDown, Align &MaxAlign); void AssignProtectedObjSet(const StackObjSet &UnassignedObjs, SmallSet &ProtectedObjs, MachineFrameInfo &MFI, bool StackGrowsDown, - int64_t &Offset, unsigned &MaxAlign); + int64_t &Offset, Align &MaxAlign); void calculateFrameObjectOffsets(MachineFunction &Fn); bool insertFrameReferenceRegisters(MachineFunction &Fn); @@ -140,22 +140,21 @@ bool LocalStackSlotPass::runOnMachineFunction(MachineFunction &MF) { } /// AdjustStackOffset - Helper function used to adjust the stack frame offset. -void LocalStackSlotPass::AdjustStackOffset(MachineFrameInfo &MFI, - int FrameIdx, int64_t &Offset, - bool StackGrowsDown, - unsigned &MaxAlign) { +void LocalStackSlotPass::AdjustStackOffset(MachineFrameInfo &MFI, int FrameIdx, + int64_t &Offset, bool StackGrowsDown, + Align &MaxAlign) { // If the stack grows down, add the object size to find the lowest address. if (StackGrowsDown) Offset += MFI.getObjectSize(FrameIdx); - unsigned Align = MFI.getObjectAlignment(FrameIdx); + Align Alignment = MFI.getObjectAlign(FrameIdx); // If the alignment of this object is greater than that of the stack, then // increase the stack alignment to match. - MaxAlign = std::max(MaxAlign, Align); + MaxAlign = std::max(MaxAlign, Alignment); // Adjust to alignment boundary. - Offset = (Offset + Align - 1) / Align * Align; + Offset = alignTo(Offset, Alignment); int64_t LocalOffset = StackGrowsDown ? -Offset : Offset; LLVM_DEBUG(dbgs() << "Allocate FI(" << FrameIdx << ") to local offset " @@ -173,11 +172,10 @@ void LocalStackSlotPass::AdjustStackOffset(MachineFrameInfo &MFI, /// AssignProtectedObjSet - Helper function to assign large stack objects (i.e., /// those required to be close to the Stack Protector) to stack offsets. -void LocalStackSlotPass::AssignProtectedObjSet(const StackObjSet &UnassignedObjs, - SmallSet &ProtectedObjs, - MachineFrameInfo &MFI, - bool StackGrowsDown, int64_t &Offset, - unsigned &MaxAlign) { +void LocalStackSlotPass::AssignProtectedObjSet( + const StackObjSet &UnassignedObjs, SmallSet &ProtectedObjs, + MachineFrameInfo &MFI, bool StackGrowsDown, int64_t &Offset, + Align &MaxAlign) { for (StackObjSet::const_iterator I = UnassignedObjs.begin(), E = UnassignedObjs.end(); I != E; ++I) { int i = *I; @@ -195,7 +193,7 @@ void LocalStackSlotPass::calculateFrameObjectOffsets(MachineFunction &Fn) { bool StackGrowsDown = TFI.getStackGrowthDirection() == TargetFrameLowering::StackGrowsDown; int64_t Offset = 0; - unsigned MaxAlign = 0; + Align MaxAlign; // Make sure that the stack protector comes before the local variables on the // stack. @@ -262,7 +260,7 @@ void LocalStackSlotPass::calculateFrameObjectOffsets(MachineFunction &Fn) { // Remember how big this blob of stack space is MFI.setLocalFrameSize(Offset); - MFI.setLocalFrameMaxAlign(assumeAligned(MaxAlign)); + MFI.setLocalFrameMaxAlign(MaxAlign); } static inline bool diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp index a5bea146346..41b6de1441d 100644 --- a/lib/CodeGen/RegisterScavenging.cpp +++ b/lib/CodeGen/RegisterScavenging.cpp @@ -466,7 +466,7 @@ RegScavenger::spill(Register Reg, const TargetRegisterClass &RC, int SPAdj, const MachineFunction &MF = *Before->getMF(); const MachineFrameInfo &MFI = MF.getFrameInfo(); unsigned NeedSize = TRI->getSpillSize(RC); - unsigned NeedAlign = TRI->getSpillAlignment(RC); + Align NeedAlign = TRI->getSpillAlign(RC); unsigned SI = Scavenged.size(), Diff = std::numeric_limits::max(); int FIB = MFI.getObjectIndexBegin(), FIE = MFI.getObjectIndexEnd(); @@ -478,7 +478,7 @@ RegScavenger::spill(Register Reg, const TargetRegisterClass &RC, int SPAdj, if (FI < FIB || FI >= FIE) continue; unsigned S = MFI.getObjectSize(FI); - unsigned A = MFI.getObjectAlignment(FI); + Align A = MFI.getObjectAlign(FI); if (NeedSize > S || NeedAlign > A) continue; // Avoid wasting slots with large size and/or large alignment. Pick one @@ -487,7 +487,7 @@ RegScavenger::spill(Register Reg, const TargetRegisterClass &RC, int SPAdj, // larger register is reserved before a slot for a smaller one. When // trying to spill a smaller register, the large slot would be found // first, thus making it impossible to spill the larger register later. - unsigned D = (S-NeedSize) + (A-NeedAlign); + unsigned D = (S - NeedSize) + (A.value() - NeedAlign.value()); if (D < Diff) { SI = I; Diff = D; diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index dbbcf10be5a..6626210e918 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -3708,12 +3708,11 @@ bool SelectionDAGISel::isOrEquivalentToAdd(const SDNode *N) const { // Detect when "or" is used to add an offset to a stack object. if (auto *FN = dyn_cast(N->getOperand(0))) { MachineFrameInfo &MFI = MF->getFrameInfo(); - unsigned A = MFI.getObjectAlignment(FN->getIndex()); - assert(isPowerOf2_32(A) && "Unexpected alignment"); + Align A = MFI.getObjectAlign(FN->getIndex()); int32_t Off = C->getSExtValue(); // If the alleged offset fits in the zero bits guaranteed by // the alignment, then this or is really an add. - return (Off >= 0) && (((A - 1) & Off) == unsigned(Off)); + return (Off >= 0) && (((A.value() - 1) & Off) == unsigned(Off)); } return false; } diff --git a/lib/CodeGen/StackColoring.cpp b/lib/CodeGen/StackColoring.cpp index 9d4fdc6b624..5ed5e8a46b0 100644 --- a/lib/CodeGen/StackColoring.cpp +++ b/lib/CodeGen/StackColoring.cpp @@ -1290,8 +1290,8 @@ bool StackColoring::runOnMachineFunction(MachineFunction &Func) { SortedSlots[J] = -1; LLVM_DEBUG(dbgs() << "Merging #" << FirstSlot << " and slots #" << SecondSlot << " together.\n"); - unsigned MaxAlignment = std::max(MFI->getObjectAlignment(FirstSlot), - MFI->getObjectAlignment(SecondSlot)); + Align MaxAlignment = std::max(MFI->getObjectAlign(FirstSlot), + MFI->getObjectAlign(SecondSlot)); assert(MFI->getObjectSize(FirstSlot) >= MFI->getObjectSize(SecondSlot) && diff --git a/lib/CodeGen/StackSlotColoring.cpp b/lib/CodeGen/StackSlotColoring.cpp index 7ae75832328..3cc5d30ebad 100644 --- a/lib/CodeGen/StackSlotColoring.cpp +++ b/lib/CodeGen/StackSlotColoring.cpp @@ -74,7 +74,7 @@ namespace { SmallVector, 16> SSRefs; // OrigAlignments - Alignments of stack objects before coloring. - SmallVector OrigAlignments; + SmallVector OrigAlignments; // OrigSizes - Sizess of stack objects before coloring. SmallVector OrigSizes; @@ -227,7 +227,7 @@ void StackSlotColoring::InitializeSlots() { continue; SSIntervals.push_back(&li); - OrigAlignments[FI] = MFI->getObjectAlignment(FI); + OrigAlignments[FI] = MFI->getObjectAlign(FI); OrigSizes[FI] = MFI->getObjectSize(FI); auto StackID = MFI->getStackID(FI); @@ -309,9 +309,9 @@ int StackSlotColoring::ColorSlot(LiveInterval *li) { // Change size and alignment of the allocated slot. If there are multiple // objects sharing the same slot, then make sure the size and alignment // are large enough for all. - unsigned Align = OrigAlignments[FI]; - if (!Share || Align > MFI->getObjectAlignment(Color)) - MFI->setObjectAlignment(Color, Align); + Align Alignment = OrigAlignments[FI]; + if (!Share || Alignment > MFI->getObjectAlign(Color)) + MFI->setObjectAlignment(Color, Alignment); int64_t Size = OrigSizes[FI]; if (!Share || Size > MFI->getObjectSize(Color)) MFI->setObjectSize(Color, Size); diff --git a/lib/Target/AArch64/AArch64FrameLowering.cpp b/lib/Target/AArch64/AArch64FrameLowering.cpp index f16c96ed70e..b5963d29798 100644 --- a/lib/Target/AArch64/AArch64FrameLowering.cpp +++ b/lib/Target/AArch64/AArch64FrameLowering.cpp @@ -2099,8 +2099,8 @@ static void computeCalleeSaveRegisterPairs( FixupDone = true; ByteOffset -= 8; assert(ByteOffset % 16 == 0); - assert(MFI.getObjectAlignment(RPI.FrameIdx) <= 16); - MFI.setObjectAlignment(RPI.FrameIdx, 16); + assert(MFI.getObjectAlign(RPI.FrameIdx) <= Align(16)); + MFI.setObjectAlignment(RPI.FrameIdx, Align(16)); } int Offset = RPI.isScalable() ? ScalableByteOffset : ByteOffset; @@ -2595,7 +2595,7 @@ static int64_t determineSVEStackObjectOffsets(MachineFrameInfo &MFI, // Assign offsets to the callee save slots. for (int I = MinCSFrameIndex; I <= MaxCSFrameIndex; ++I) { Offset += MFI.getObjectSize(I); - Offset = alignTo(Offset, MFI.getObjectAlignment(I)); + Offset = alignTo(Offset, MFI.getObjectAlign(I)); if (AssignOffsets) Assign(I, -Offset); } @@ -2617,15 +2617,15 @@ static int64_t determineSVEStackObjectOffsets(MachineFrameInfo &MFI, // Allocate all SVE locals and spills for (unsigned FI : ObjectsToAllocate) { - unsigned Align = MFI.getObjectAlignment(FI); + Align Alignment = MFI.getObjectAlign(FI); // FIXME: Given that the length of SVE vectors is not necessarily a power of // two, we'd need to align every object dynamically at runtime if the // alignment is larger than 16. This is not yet supported. - if (Align > 16) + if (Alignment > Align(16)) report_fatal_error( "Alignment of scalable vectors > 16 bytes is not yet supported"); - Offset = alignTo(Offset + MFI.getObjectSize(FI), Align); + Offset = alignTo(Offset + MFI.getObjectSize(FI), Alignment); if (AssignOffsets) Assign(FI, -Offset); } diff --git a/lib/Target/AMDGPU/R600FrameLowering.cpp b/lib/Target/AMDGPU/R600FrameLowering.cpp index d9aa9ebe878..d2fe3c9f93c 100644 --- a/lib/Target/AMDGPU/R600FrameLowering.cpp +++ b/lib/Target/AMDGPU/R600FrameLowering.cpp @@ -35,15 +35,15 @@ int R600FrameLowering::getFrameIndexReference(const MachineFunction &MF, int UpperBound = FI == -1 ? MFI.getNumObjects() : FI; for (int i = MFI.getObjectIndexBegin(); i < UpperBound; ++i) { - OffsetBytes = alignTo(OffsetBytes, MFI.getObjectAlignment(i)); + OffsetBytes = alignTo(OffsetBytes, MFI.getObjectAlign(i)); OffsetBytes += MFI.getObjectSize(i); // Each register holds 4 bytes, so we must always align the offset to at // least 4 bytes, so that 2 frame objects won't share the same register. - OffsetBytes = alignTo(OffsetBytes, 4); + OffsetBytes = alignTo(OffsetBytes, Align(4)); } if (FI != -1) - OffsetBytes = alignTo(OffsetBytes, MFI.getObjectAlignment(FI)); + OffsetBytes = alignTo(OffsetBytes, MFI.getObjectAlign(FI)); return OffsetBytes / (getStackWidth(MF) * 4); } diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp index f424f22464e..3c6f446580b 100644 --- a/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -1191,8 +1191,8 @@ bool ARMDAGToDAGISel::SelectThumbAddrModeSP(SDValue N, // Only multiples of 4 are allowed for the offset, so the frame object // alignment must be at least 4. MachineFrameInfo &MFI = MF->getFrameInfo(); - if (MFI.getObjectAlignment(FI) < 4) - MFI.setObjectAlignment(FI, 4); + if (MFI.getObjectAlign(FI) < Align(4)) + MFI.setObjectAlignment(FI, Align(4)); Base = CurDAG->getTargetFrameIndex( FI, TLI->getPointerTy(CurDAG->getDataLayout())); OffImm = CurDAG->getTargetConstant(0, SDLoc(N), MVT::i32); @@ -1215,9 +1215,9 @@ bool ARMDAGToDAGISel::SelectThumbAddrModeSP(SDValue N, if (RHSC * 4 < MFI.getObjectSize(FI)) { // For LHS+RHS to result in an offset that's a multiple of 4 the object // indexed by the LHS must be 4-byte aligned. - if (!MFI.isFixedObjectIndex(FI) && MFI.getObjectAlignment(FI) < 4) - MFI.setObjectAlignment(FI, 4); - if (MFI.getObjectAlignment(FI) >= 4) { + if (!MFI.isFixedObjectIndex(FI) && MFI.getObjectAlign(FI) < Align(4)) + MFI.setObjectAlignment(FI, Align(4)); + if (MFI.getObjectAlign(FI) >= Align(4)) { Base = CurDAG->getTargetFrameIndex( FI, TLI->getPointerTy(CurDAG->getDataLayout())); OffImm = CurDAG->getTargetConstant(RHSC, SDLoc(N), MVT::i32); @@ -3420,8 +3420,8 @@ void ARMDAGToDAGISel::Select(SDNode *N) { // Set the alignment of the frame object to 4, to avoid having to generate // more than one ADD MachineFrameInfo &MFI = MF->getFrameInfo(); - if (MFI.getObjectAlignment(FI) < 4) - MFI.setObjectAlignment(FI, 4); + if (MFI.getObjectAlign(FI) < Align(4)) + MFI.setObjectAlignment(FI, Align(4)); CurDAG->SelectNodeTo(N, ARM::tADDframe, MVT::i32, TFI, CurDAG->getTargetConstant(0, dl, MVT::i32)); return; diff --git a/lib/Target/Hexagon/HexagonBitTracker.cpp b/lib/Target/Hexagon/HexagonBitTracker.cpp index ebd060ce503..1e4030b84bc 100644 --- a/lib/Target/Hexagon/HexagonBitTracker.cpp +++ b/lib/Target/Hexagon/HexagonBitTracker.cpp @@ -330,7 +330,7 @@ bool HexagonEvaluator::evaluate(const MachineInstr &MI, case PS_fi: { int FI = op(1).getIndex(); int Off = op(2).getImm(); - unsigned A = MFI.getObjectAlignment(FI) + std::abs(Off); + unsigned A = MFI.getObjectAlign(FI).value() + std::abs(Off); unsigned L = countTrailingZeros(A); RegisterCell RC = RegisterCell::self(Reg[0].Reg, W0); RC.fill(0, L, BT::BitValue::Zero); diff --git a/lib/Target/Hexagon/HexagonFrameLowering.cpp b/lib/Target/Hexagon/HexagonFrameLowering.cpp index 9c39d0bf844..a9cfbdc3c6f 100644 --- a/lib/Target/Hexagon/HexagonFrameLowering.cpp +++ b/lib/Target/Hexagon/HexagonFrameLowering.cpp @@ -645,15 +645,15 @@ void HexagonFrameLowering::insertPrologueInBlock(MachineBasicBlock &MBB, auto &HMFI = *MF.getInfo(); for (int i = HMFI.getFirstNamedArgFrameIndex(), e = HMFI.getLastNamedArgFrameIndex(); i >= e; --i) { - int ObjSize = MFI.getObjectSize(i); - int ObjAlign = MFI.getObjectAlignment(i); + uint64_t ObjSize = MFI.getObjectSize(i); + Align ObjAlign = MFI.getObjectAlign(i); // Determine the kind of load/store that should be used. unsigned LDOpc, STOpc; - int OpcodeChecker = ObjAlign; + uint64_t OpcodeChecker = ObjAlign.value(); // Handle cases where alignment of an object is > its size. - if (ObjSize < ObjAlign) { + if (ObjAlign > ObjSize) { if (ObjSize <= 1) OpcodeChecker = 1; else if (ObjSize <= 2) @@ -702,17 +702,17 @@ void HexagonFrameLowering::insertPrologueInBlock(MachineBasicBlock &MBB, while (Count < LoadStoreCount) { // Load the value of the named argument on stack. BuildMI(MBB, InsertPt, dl, HII.get(LDOpc), RegUsed) - .addReg(SP) - .addImm(RegisterSavedAreaSizePlusPadding + - ObjAlign * Count + NumBytes) - .setMIFlag(MachineInstr::FrameSetup); + .addReg(SP) + .addImm(RegisterSavedAreaSizePlusPadding + + ObjAlign.value() * Count + NumBytes) + .setMIFlag(MachineInstr::FrameSetup); // Store it below the register saved area plus padding. BuildMI(MBB, InsertPt, dl, HII.get(STOpc)) - .addReg(SP) - .addImm(ObjAlign * Count + NumBytes) - .addReg(RegUsed) - .setMIFlag(MachineInstr::FrameSetup); + .addReg(SP) + .addImm(ObjAlign.value() * Count + NumBytes) + .addReg(RegUsed) + .setMIFlag(MachineInstr::FrameSetup); Count++; } @@ -1520,8 +1520,8 @@ void HexagonFrameLowering::processFunctionBeforeFrameFinalized( unsigned S = MFI.getObjectSize(i); // Reduce the alignment to at most 8. This will require unaligned vector // stores if they happen here. - unsigned A = std::max(MFI.getObjectAlignment(i), 8U); - MFI.setObjectAlignment(i, 8); + Align A = std::max(MFI.getObjectAlign(i), Align(8)); + MFI.setObjectAlignment(i, Align(8)); LFS = alignTo(LFS+S, A); MFI.mapLocalFrameObject(i, -static_cast(LFS)); DealignSlots.insert(i); @@ -1934,11 +1934,11 @@ bool HexagonFrameLowering::expandStoreVec2(MachineBasicBlock &B, bool NeedsAligna = needsAligna(MF); unsigned Size = HRI.getSpillSize(Hexagon::HvxVRRegClass); - unsigned NeedAlign = HRI.getSpillAlignment(Hexagon::HvxVRRegClass); - unsigned HasAlign = MFI.getObjectAlignment(FI); + Align NeedAlign = HRI.getSpillAlign(Hexagon::HvxVRRegClass); + Align HasAlign = MFI.getObjectAlign(FI); unsigned StoreOpc; - auto UseAligned = [&] (unsigned NeedAlign, unsigned HasAlign) { + auto UseAligned = [&](Align NeedAlign, Align HasAlign) { return !NeedsAligna && (NeedAlign <= HasAlign); }; @@ -1986,11 +1986,11 @@ bool HexagonFrameLowering::expandLoadVec2(MachineBasicBlock &B, bool NeedsAligna = needsAligna(MF); unsigned Size = HRI.getSpillSize(Hexagon::HvxVRRegClass); - unsigned NeedAlign = HRI.getSpillAlignment(Hexagon::HvxVRRegClass); - unsigned HasAlign = MFI.getObjectAlignment(FI); + Align NeedAlign = HRI.getSpillAlign(Hexagon::HvxVRRegClass); + Align HasAlign = MFI.getObjectAlign(FI); unsigned LoadOpc; - auto UseAligned = [&] (unsigned NeedAlign, unsigned HasAlign) { + auto UseAligned = [&](Align NeedAlign, Align HasAlign) { return !NeedsAligna && (NeedAlign <= HasAlign); }; @@ -2030,8 +2030,8 @@ bool HexagonFrameLowering::expandStoreVec(MachineBasicBlock &B, bool IsKill = MI->getOperand(2).isKill(); int FI = MI->getOperand(0).getIndex(); - unsigned NeedAlign = HRI.getSpillAlignment(Hexagon::HvxVRRegClass); - unsigned HasAlign = MFI.getObjectAlignment(FI); + Align NeedAlign = HRI.getSpillAlign(Hexagon::HvxVRRegClass); + Align HasAlign = MFI.getObjectAlign(FI); bool UseAligned = !NeedsAligna && (NeedAlign <= HasAlign); unsigned StoreOpc = UseAligned ? Hexagon::V6_vS32b_ai : Hexagon::V6_vS32Ub_ai; @@ -2060,8 +2060,8 @@ bool HexagonFrameLowering::expandLoadVec(MachineBasicBlock &B, Register DstR = MI->getOperand(0).getReg(); int FI = MI->getOperand(1).getIndex(); - unsigned NeedAlign = HRI.getSpillAlignment(Hexagon::HvxVRRegClass); - unsigned HasAlign = MFI.getObjectAlignment(FI); + Align NeedAlign = HRI.getSpillAlign(Hexagon::HvxVRRegClass); + Align HasAlign = MFI.getObjectAlign(FI); bool UseAligned = !NeedsAligna && (NeedAlign <= HasAlign); unsigned LoadOpc = UseAligned ? Hexagon::V6_vL32b_ai : Hexagon::V6_vL32Ub_ai; diff --git a/lib/Target/Mips/MipsRegisterInfo.cpp b/lib/Target/Mips/MipsRegisterInfo.cpp index 1d1744a49b3..08967a534bf 100644 --- a/lib/Target/Mips/MipsRegisterInfo.cpp +++ b/lib/Target/Mips/MipsRegisterInfo.cpp @@ -266,7 +266,7 @@ eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, << "spOffset : " << spOffset << "\n" << "stackSize : " << stackSize << "\n" << "alignment : " - << MF.getFrameInfo().getObjectAlignment(FrameIndex) + << MF.getFrameInfo().getObjectAlign(FrameIndex).value() << "\n"); eliminateFI(MI, FIOperandNum, FrameIndex, stackSize, spOffset); diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index 523bbe7dd36..a233dc9b347 100644 --- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -4213,7 +4213,7 @@ bool PPCDAGToDAGISel::isOffsetMultipleOf(SDNode *N, unsigned Val) const { // because it is translated to r31 or r1 + slot + offset. We won't know the // slot number until the stack frame is finalized. const MachineFrameInfo &MFI = CurDAG->getMachineFunction().getFrameInfo(); - unsigned SlotAlign = MFI.getObjectAlignment(FI->getIndex()); + unsigned SlotAlign = MFI.getObjectAlign(FI->getIndex()).value(); if ((SlotAlign % Val) != 0) return false; diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 3a718f248cd..3223efbdc66 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -2417,8 +2417,7 @@ static void fixupFuncForFI(SelectionDAG &DAG, int FrameIdx, EVT VT) { MachineFunction &MF = DAG.getMachineFunction(); MachineFrameInfo &MFI = MF.getFrameInfo(); - unsigned Align = MFI.getObjectAlignment(FrameIdx); - if (Align >= 4) + if (MFI.getObjectAlign(FrameIdx) >= Align(4)) return; PPCFunctionInfo *FuncInfo = MF.getInfo(); diff --git a/lib/Target/X86/X86FrameLowering.cpp b/lib/Target/X86/X86FrameLowering.cpp index f394fa403a1..0e8e94e311d 100644 --- a/lib/Target/X86/X86FrameLowering.cpp +++ b/lib/Target/X86/X86FrameLowering.cpp @@ -2012,7 +2012,7 @@ int X86FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI, // Skip the saved EBP. return Offset + SlotSize + FPDelta; } else { - assert((-(Offset + StackSize)) % MFI.getObjectAlignment(FI) == 0); + assert(isAligned(MFI.getObjectAlign(FI), -(Offset + StackSize))); return Offset + StackSize; } } else if (TRI->needsStackRealignment(MF)) { @@ -2020,7 +2020,7 @@ int X86FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI, // Skip the saved EBP. return Offset + SlotSize + FPDelta; } else { - assert((-(Offset + StackSize)) % MFI.getObjectAlignment(FI) == 0); + assert(isAligned(MFI.getObjectAlign(FI), -(Offset + StackSize))); return Offset + StackSize; } // FIXME: Support tail calls @@ -3203,7 +3203,7 @@ struct X86FrameSortingObject { bool IsValid = false; // true if we care about this Object. unsigned ObjectIndex = 0; // Index of Object into MFI list. unsigned ObjectSize = 0; // Size of Object in bytes. - unsigned ObjectAlignment = 1; // Alignment of Object in bytes. + Align ObjectAlignment = Align(1); // Alignment of Object in bytes. unsigned ObjectNumUses = 0; // Object static number of uses. }; @@ -3288,7 +3288,7 @@ void X86FrameLowering::orderFrameObjects( for (auto &Obj : ObjectsToAllocate) { SortingObjects[Obj].IsValid = true; SortingObjects[Obj].ObjectIndex = Obj; - SortingObjects[Obj].ObjectAlignment = MFI.getObjectAlignment(Obj); + SortingObjects[Obj].ObjectAlignment = MFI.getObjectAlign(Obj); // Set the size. int ObjectSize = MFI.getObjectSize(Obj); if (ObjectSize == 0) @@ -3381,7 +3381,7 @@ void X86FrameLowering::processFunctionBeforeFrameFinalized( int FrameIndex = H.CatchObj.FrameIndex; if (FrameIndex != INT_MAX) { // Ensure alignment. - unsigned Align = MFI.getObjectAlignment(FrameIndex); + unsigned Align = MFI.getObjectAlign(FrameIndex).value(); MinFixedObjOffset -= std::abs(MinFixedObjOffset) % Align; MinFixedObjOffset -= MFI.getObjectSize(FrameIndex); MFI.setObjectOffset(FrameIndex, MinFixedObjOffset);