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build/cmake: Use tblgen macro directly instead of llvm_tablegen, which just
added a layer of indirection with no value (not even conciseness). llvm-svn: 143727
This commit is contained in:
Daniel Dunbar
parent
a022f4813e
commit
799f4bb723
@ -184,10 +184,6 @@ endif( ${CMAKE_SYSTEM_NAME} MATCHES SunOS )
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include(AddLLVM)
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include(TableGen)
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macro(llvm_tablegen)
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tablegen(LLVM ${ARGN})
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endmacro()
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if( MINGW )
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# People report that -O3 is unreliable on MinGW. The traditional
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# build also uses -O2 for that reason:
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@ -1,6 +1,6 @@
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set(LLVM_TARGET_DEFINITIONS Intrinsics.td)
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llvm_tablegen(Intrinsics.gen -gen-intrinsic)
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tablegen(LLVM Intrinsics.gen -gen-intrinsic)
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add_custom_target(intrinsics_gen ALL
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DEPENDS ${llvm_builded_incs_dir}/Intrinsics.gen)
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@ -1,18 +1,18 @@
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set(LLVM_TARGET_DEFINITIONS ARM.td)
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llvm_tablegen(ARMGenRegisterInfo.inc -gen-register-info)
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llvm_tablegen(ARMGenInstrInfo.inc -gen-instr-info)
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llvm_tablegen(ARMGenCodeEmitter.inc -gen-emitter)
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llvm_tablegen(ARMGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
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llvm_tablegen(ARMGenMCPseudoLowering.inc -gen-pseudo-lowering)
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llvm_tablegen(ARMGenAsmWriter.inc -gen-asm-writer)
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llvm_tablegen(ARMGenAsmMatcher.inc -gen-asm-matcher)
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llvm_tablegen(ARMGenDAGISel.inc -gen-dag-isel)
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llvm_tablegen(ARMGenFastISel.inc -gen-fast-isel)
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llvm_tablegen(ARMGenCallingConv.inc -gen-callingconv)
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llvm_tablegen(ARMGenSubtargetInfo.inc -gen-subtarget)
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llvm_tablegen(ARMGenEDInfo.inc -gen-enhanced-disassembly-info)
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llvm_tablegen(ARMGenDisassemblerTables.inc -gen-disassembler)
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tablegen(LLVM ARMGenRegisterInfo.inc -gen-register-info)
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tablegen(LLVM ARMGenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM ARMGenCodeEmitter.inc -gen-emitter)
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tablegen(LLVM ARMGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
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tablegen(LLVM ARMGenMCPseudoLowering.inc -gen-pseudo-lowering)
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tablegen(LLVM ARMGenAsmWriter.inc -gen-asm-writer)
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tablegen(LLVM ARMGenAsmMatcher.inc -gen-asm-matcher)
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tablegen(LLVM ARMGenDAGISel.inc -gen-dag-isel)
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tablegen(LLVM ARMGenFastISel.inc -gen-fast-isel)
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tablegen(LLVM ARMGenCallingConv.inc -gen-callingconv)
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tablegen(LLVM ARMGenSubtargetInfo.inc -gen-subtarget)
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tablegen(LLVM ARMGenEDInfo.inc -gen-enhanced-disassembly-info)
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tablegen(LLVM ARMGenDisassemblerTables.inc -gen-disassembler)
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add_public_tablegen_target(ARMCommonTableGen)
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add_llvm_target(ARMCodeGen
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@ -1,12 +1,12 @@
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set(LLVM_TARGET_DEFINITIONS SPU.td)
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llvm_tablegen(SPUGenAsmWriter.inc -gen-asm-writer)
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llvm_tablegen(SPUGenCodeEmitter.inc -gen-emitter)
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llvm_tablegen(SPUGenRegisterInfo.inc -gen-register-info)
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llvm_tablegen(SPUGenInstrInfo.inc -gen-instr-info)
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llvm_tablegen(SPUGenDAGISel.inc -gen-dag-isel)
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llvm_tablegen(SPUGenSubtargetInfo.inc -gen-subtarget)
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llvm_tablegen(SPUGenCallingConv.inc -gen-callingconv)
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tablegen(LLVM SPUGenAsmWriter.inc -gen-asm-writer)
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tablegen(LLVM SPUGenCodeEmitter.inc -gen-emitter)
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tablegen(LLVM SPUGenRegisterInfo.inc -gen-register-info)
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tablegen(LLVM SPUGenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM SPUGenDAGISel.inc -gen-dag-isel)
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tablegen(LLVM SPUGenSubtargetInfo.inc -gen-subtarget)
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tablegen(LLVM SPUGenCallingConv.inc -gen-callingconv)
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add_public_tablegen_target(CellSPUCommonTableGen)
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add_llvm_target(CellSPUCodeGen
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@ -1,15 +1,15 @@
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set(LLVM_TARGET_DEFINITIONS MBlaze.td)
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llvm_tablegen(MBlazeGenRegisterInfo.inc -gen-register-info)
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llvm_tablegen(MBlazeGenInstrInfo.inc -gen-instr-info)
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llvm_tablegen(MBlazeGenCodeEmitter.inc -gen-emitter)
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llvm_tablegen(MBlazeGenAsmWriter.inc -gen-asm-writer)
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llvm_tablegen(MBlazeGenAsmMatcher.inc -gen-asm-matcher)
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llvm_tablegen(MBlazeGenDAGISel.inc -gen-dag-isel)
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llvm_tablegen(MBlazeGenCallingConv.inc -gen-callingconv)
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llvm_tablegen(MBlazeGenSubtargetInfo.inc -gen-subtarget)
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llvm_tablegen(MBlazeGenIntrinsics.inc -gen-tgt-intrinsic)
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llvm_tablegen(MBlazeGenEDInfo.inc -gen-enhanced-disassembly-info)
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tablegen(LLVM MBlazeGenRegisterInfo.inc -gen-register-info)
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tablegen(LLVM MBlazeGenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM MBlazeGenCodeEmitter.inc -gen-emitter)
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tablegen(LLVM MBlazeGenAsmWriter.inc -gen-asm-writer)
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tablegen(LLVM MBlazeGenAsmMatcher.inc -gen-asm-matcher)
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tablegen(LLVM MBlazeGenDAGISel.inc -gen-dag-isel)
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tablegen(LLVM MBlazeGenCallingConv.inc -gen-callingconv)
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tablegen(LLVM MBlazeGenSubtargetInfo.inc -gen-subtarget)
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tablegen(LLVM MBlazeGenIntrinsics.inc -gen-tgt-intrinsic)
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tablegen(LLVM MBlazeGenEDInfo.inc -gen-enhanced-disassembly-info)
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add_public_tablegen_target(MBlazeCommonTableGen)
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add_llvm_target(MBlazeCodeGen
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@ -1,11 +1,11 @@
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set(LLVM_TARGET_DEFINITIONS MSP430.td)
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llvm_tablegen(MSP430GenRegisterInfo.inc -gen-register-info)
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llvm_tablegen(MSP430GenInstrInfo.inc -gen-instr-info)
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llvm_tablegen(MSP430GenAsmWriter.inc -gen-asm-writer)
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llvm_tablegen(MSP430GenDAGISel.inc -gen-dag-isel)
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llvm_tablegen(MSP430GenCallingConv.inc -gen-callingconv)
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llvm_tablegen(MSP430GenSubtargetInfo.inc -gen-subtarget)
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tablegen(LLVM MSP430GenRegisterInfo.inc -gen-register-info)
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tablegen(LLVM MSP430GenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM MSP430GenAsmWriter.inc -gen-asm-writer)
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tablegen(LLVM MSP430GenDAGISel.inc -gen-dag-isel)
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tablegen(LLVM MSP430GenCallingConv.inc -gen-callingconv)
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tablegen(LLVM MSP430GenSubtargetInfo.inc -gen-subtarget)
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add_public_tablegen_target(MSP430CommonTableGen)
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add_llvm_target(MSP430CodeGen
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@ -1,12 +1,12 @@
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set(LLVM_TARGET_DEFINITIONS Mips.td)
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llvm_tablegen(MipsGenRegisterInfo.inc -gen-register-info)
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llvm_tablegen(MipsGenInstrInfo.inc -gen-instr-info)
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llvm_tablegen(MipsGenCodeEmitter.inc -gen-emitter)
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llvm_tablegen(MipsGenAsmWriter.inc -gen-asm-writer)
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llvm_tablegen(MipsGenDAGISel.inc -gen-dag-isel)
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llvm_tablegen(MipsGenCallingConv.inc -gen-callingconv)
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llvm_tablegen(MipsGenSubtargetInfo.inc -gen-subtarget)
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tablegen(LLVM MipsGenRegisterInfo.inc -gen-register-info)
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tablegen(LLVM MipsGenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM MipsGenCodeEmitter.inc -gen-emitter)
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tablegen(LLVM MipsGenAsmWriter.inc -gen-asm-writer)
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tablegen(LLVM MipsGenDAGISel.inc -gen-dag-isel)
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tablegen(LLVM MipsGenCallingConv.inc -gen-callingconv)
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tablegen(LLVM MipsGenSubtargetInfo.inc -gen-subtarget)
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add_public_tablegen_target(MipsCommonTableGen)
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add_llvm_target(MipsCodeGen
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@ -1,10 +1,10 @@
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set(LLVM_TARGET_DEFINITIONS PTX.td)
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llvm_tablegen(PTXGenAsmWriter.inc -gen-asm-writer)
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llvm_tablegen(PTXGenDAGISel.inc -gen-dag-isel)
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llvm_tablegen(PTXGenInstrInfo.inc -gen-instr-info)
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llvm_tablegen(PTXGenRegisterInfo.inc -gen-register-info)
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llvm_tablegen(PTXGenSubtargetInfo.inc -gen-subtarget)
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tablegen(LLVM PTXGenAsmWriter.inc -gen-asm-writer)
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tablegen(LLVM PTXGenDAGISel.inc -gen-dag-isel)
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tablegen(LLVM PTXGenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM PTXGenRegisterInfo.inc -gen-register-info)
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tablegen(LLVM PTXGenSubtargetInfo.inc -gen-subtarget)
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add_public_tablegen_target(PTXCommonTableGen)
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add_llvm_target(PTXCodeGen
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@ -1,13 +1,13 @@
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set(LLVM_TARGET_DEFINITIONS PPC.td)
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llvm_tablegen(PPCGenAsmWriter.inc -gen-asm-writer)
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llvm_tablegen(PPCGenCodeEmitter.inc -gen-emitter)
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llvm_tablegen(PPCGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
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llvm_tablegen(PPCGenRegisterInfo.inc -gen-register-info)
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llvm_tablegen(PPCGenInstrInfo.inc -gen-instr-info)
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llvm_tablegen(PPCGenDAGISel.inc -gen-dag-isel)
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llvm_tablegen(PPCGenCallingConv.inc -gen-callingconv)
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llvm_tablegen(PPCGenSubtargetInfo.inc -gen-subtarget)
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tablegen(LLVM PPCGenAsmWriter.inc -gen-asm-writer)
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tablegen(LLVM PPCGenCodeEmitter.inc -gen-emitter)
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tablegen(LLVM PPCGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
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tablegen(LLVM PPCGenRegisterInfo.inc -gen-register-info)
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tablegen(LLVM PPCGenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM PPCGenDAGISel.inc -gen-dag-isel)
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tablegen(LLVM PPCGenCallingConv.inc -gen-callingconv)
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tablegen(LLVM PPCGenSubtargetInfo.inc -gen-subtarget)
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add_public_tablegen_target(PowerPCCommonTableGen)
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add_llvm_target(PowerPCCodeGen
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@ -1,11 +1,11 @@
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set(LLVM_TARGET_DEFINITIONS Sparc.td)
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llvm_tablegen(SparcGenRegisterInfo.inc -gen-register-info)
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llvm_tablegen(SparcGenInstrInfo.inc -gen-instr-info)
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llvm_tablegen(SparcGenAsmWriter.inc -gen-asm-writer)
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llvm_tablegen(SparcGenDAGISel.inc -gen-dag-isel)
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llvm_tablegen(SparcGenSubtargetInfo.inc -gen-subtarget)
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llvm_tablegen(SparcGenCallingConv.inc -gen-callingconv)
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tablegen(LLVM SparcGenRegisterInfo.inc -gen-register-info)
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tablegen(LLVM SparcGenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM SparcGenAsmWriter.inc -gen-asm-writer)
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tablegen(LLVM SparcGenDAGISel.inc -gen-dag-isel)
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tablegen(LLVM SparcGenSubtargetInfo.inc -gen-subtarget)
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tablegen(LLVM SparcGenCallingConv.inc -gen-callingconv)
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add_public_tablegen_target(SparcCommonTableGen)
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add_llvm_target(SparcCodeGen
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@ -1,16 +1,16 @@
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set(LLVM_TARGET_DEFINITIONS X86.td)
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llvm_tablegen(X86GenRegisterInfo.inc -gen-register-info)
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llvm_tablegen(X86GenDisassemblerTables.inc -gen-disassembler)
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llvm_tablegen(X86GenInstrInfo.inc -gen-instr-info)
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llvm_tablegen(X86GenAsmWriter.inc -gen-asm-writer)
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llvm_tablegen(X86GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
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llvm_tablegen(X86GenAsmMatcher.inc -gen-asm-matcher)
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llvm_tablegen(X86GenDAGISel.inc -gen-dag-isel)
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llvm_tablegen(X86GenFastISel.inc -gen-fast-isel)
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llvm_tablegen(X86GenCallingConv.inc -gen-callingconv)
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llvm_tablegen(X86GenSubtargetInfo.inc -gen-subtarget)
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llvm_tablegen(X86GenEDInfo.inc -gen-enhanced-disassembly-info)
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tablegen(LLVM X86GenRegisterInfo.inc -gen-register-info)
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tablegen(LLVM X86GenDisassemblerTables.inc -gen-disassembler)
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tablegen(LLVM X86GenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM X86GenAsmWriter.inc -gen-asm-writer)
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tablegen(LLVM X86GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
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tablegen(LLVM X86GenAsmMatcher.inc -gen-asm-matcher)
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tablegen(LLVM X86GenDAGISel.inc -gen-dag-isel)
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tablegen(LLVM X86GenFastISel.inc -gen-fast-isel)
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tablegen(LLVM X86GenCallingConv.inc -gen-callingconv)
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tablegen(LLVM X86GenSubtargetInfo.inc -gen-subtarget)
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tablegen(LLVM X86GenEDInfo.inc -gen-enhanced-disassembly-info)
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add_public_tablegen_target(X86CommonTableGen)
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set(sources
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@ -1,11 +1,11 @@
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set(LLVM_TARGET_DEFINITIONS XCore.td)
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llvm_tablegen(XCoreGenRegisterInfo.inc -gen-register-info)
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llvm_tablegen(XCoreGenInstrInfo.inc -gen-instr-info)
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llvm_tablegen(XCoreGenAsmWriter.inc -gen-asm-writer)
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llvm_tablegen(XCoreGenDAGISel.inc -gen-dag-isel)
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llvm_tablegen(XCoreGenCallingConv.inc -gen-callingconv)
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llvm_tablegen(XCoreGenSubtargetInfo.inc -gen-subtarget)
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tablegen(LLVM XCoreGenRegisterInfo.inc -gen-register-info)
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tablegen(LLVM XCoreGenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM XCoreGenAsmWriter.inc -gen-asm-writer)
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tablegen(LLVM XCoreGenDAGISel.inc -gen-dag-isel)
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tablegen(LLVM XCoreGenCallingConv.inc -gen-callingconv)
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tablegen(LLVM XCoreGenSubtargetInfo.inc -gen-subtarget)
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add_public_tablegen_target(XCoreCommonTableGen)
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add_llvm_target(XCoreCodeGen
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