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[MC] Move MCInstrAnalysis::evaluateBranch to X86MCInstrAnalysis::evaluateBranch

The generic implementation is actually specific to x86. It assumes the
offset is relative to the end of the instruction and the immediate is
not scaled (which is false on most RISC).
This commit is contained in:
Fangrui Song 2020-04-29 23:17:14 -07:00
parent 86a7336cb6
commit 79d84987ff
2 changed files with 16 additions and 9 deletions

View File

@ -23,15 +23,10 @@ bool MCInstrAnalysis::clearsSuperRegisters(const MCRegisterInfo &MRI,
return false; return false;
} }
bool MCInstrAnalysis::evaluateBranch(const MCInst &Inst, uint64_t Addr, bool MCInstrAnalysis::evaluateBranch(const MCInst & /*Inst*/, uint64_t /*Addr*/,
uint64_t Size, uint64_t &Target) const { uint64_t /*Size*/,
if (Inst.getNumOperands() == 0 || uint64_t & /*Target*/) const {
Info->get(Inst.getOpcode()).OpInfo[0].OperandType != MCOI::OPERAND_PCREL) return false;
return false;
int64_t Imm = Inst.getOperand(0).getImm();
Target = Addr+Size+Imm;
return true;
} }
Optional<uint64_t> Optional<uint64_t>

View File

@ -400,6 +400,9 @@ public:
findPltEntries(uint64_t PltSectionVA, ArrayRef<uint8_t> PltContents, findPltEntries(uint64_t PltSectionVA, ArrayRef<uint8_t> PltContents,
uint64_t GotSectionVA, uint64_t GotSectionVA,
const Triple &TargetTriple) const override; const Triple &TargetTriple) const override;
bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
uint64_t &Target) const override;
Optional<uint64_t> evaluateMemoryOperandAddress(const MCInst &Inst, Optional<uint64_t> evaluateMemoryOperandAddress(const MCInst &Inst,
uint64_t Addr, uint64_t Addr,
uint64_t Size) const override; uint64_t Size) const override;
@ -518,6 +521,15 @@ std::vector<std::pair<uint64_t, uint64_t>> X86MCInstrAnalysis::findPltEntries(
} }
} }
bool X86MCInstrAnalysis::evaluateBranch(const MCInst &Inst, uint64_t Addr,
uint64_t Size, uint64_t &Target) const {
if (Inst.getNumOperands() == 0 ||
Info->get(Inst.getOpcode()).OpInfo[0].OperandType != MCOI::OPERAND_PCREL)
return false;
Target = Addr + Size + Inst.getOperand(0).getImm();
return true;
}
Optional<uint64_t> X86MCInstrAnalysis::evaluateMemoryOperandAddress( Optional<uint64_t> X86MCInstrAnalysis::evaluateMemoryOperandAddress(
const MCInst &Inst, uint64_t Addr, uint64_t Size) const { const MCInst &Inst, uint64_t Addr, uint64_t Size) const {
const MCInstrDesc &MCID = Info->get(Inst.getOpcode()); const MCInstrDesc &MCID = Info->get(Inst.getOpcode());