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[x86] adjust LEA tests for better coverage; NFC
The scale can 1, 2, or 3. llvm-svn: 358539
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@ -40,11 +40,11 @@ define i32 @and_i8_zext_shl_add_i32(i32 %t0, i8 %t1) {
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; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: andl $8, %esi
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; CHECK-NEXT: leal (%rdi,%rsi,4), %eax
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; CHECK-NEXT: leal (%rdi,%rsi,8), %eax
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; CHECK-NEXT: retq
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%t4 = and i8 %t1, 8
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%t5 = zext i8 %t4 to i32
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%sh = shl i32 %t5, 2
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%sh = shl i32 %t5, 3
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%t6 = add i32 %sh, %t0
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ret i32 %t6
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}
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@ -53,12 +53,12 @@ define i32 @and_i8_shl_zext_add_i32(i32 %t0, i8 %t1) {
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; CHECK-LABEL: and_i8_shl_zext_add_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: andb $8, %sil
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; CHECK-NEXT: shlb $2, %sil
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; CHECK-NEXT: shlb $3, %sil
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; CHECK-NEXT: movzbl %sil, %eax
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; CHECK-NEXT: addl %edi, %eax
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; CHECK-NEXT: retq
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%t4 = and i8 %t1, 8
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%sh = shl i8 %t4, 2
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%sh = shl i8 %t4, 3
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%t5 = zext i8 %sh to i32
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%t6 = add i32 %t5, %t0
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ret i32 %t6
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@ -99,11 +99,11 @@ define i64 @and_i8_zext_shl_add_i64(i64 %t0, i8 %t1) {
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
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; CHECK-NEXT: andl $8, %esi
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; CHECK-NEXT: leaq (%rdi,%rsi,4), %rax
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; CHECK-NEXT: leaq (%rdi,%rsi,2), %rax
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; CHECK-NEXT: retq
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%t4 = and i8 %t1, 8
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%t5 = zext i8 %t4 to i64
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%sh = shl i64 %t5, 2
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%sh = shl i64 %t5, 1
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%t6 = add i64 %sh, %t0
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ret i64 %t6
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}
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@ -112,12 +112,12 @@ define i64 @and_i8_shl_zext_add_i64(i64 %t0, i8 %t1) {
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; CHECK-LABEL: and_i8_shl_zext_add_i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: andb $8, %sil
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; CHECK-NEXT: shlb $2, %sil
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; CHECK-NEXT: addb %sil, %sil
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; CHECK-NEXT: movzbl %sil, %eax
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; CHECK-NEXT: addq %rdi, %rax
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; CHECK-NEXT: retq
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%t4 = and i8 %t1, 8
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%sh = shl i8 %t4, 2
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%sh = shl i8 %t4, 1
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%t5 = zext i8 %sh to i64
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%t6 = add i64 %t5, %t0
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ret i64 %t6
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@ -128,11 +128,11 @@ define i64 @and_i32_zext_shl_add_i64(i64 %t0, i32 %t1) {
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
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; CHECK-NEXT: andl $8, %esi
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; CHECK-NEXT: leaq (%rdi,%rsi,4), %rax
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; CHECK-NEXT: leaq (%rdi,%rsi,8), %rax
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; CHECK-NEXT: retq
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%t4 = and i32 %t1, 8
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%t5 = zext i32 %t4 to i64
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%sh = shl i64 %t5, 2
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%sh = shl i64 %t5, 3
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%t6 = add i64 %sh, %t0
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ret i64 %t6
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}
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@ -142,13 +142,42 @@ define i64 @and_i32_shl_zext_add_i64(i64 %t0, i32 %t1) {
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
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; CHECK-NEXT: andl $8, %esi
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; CHECK-NEXT: leal (,%rsi,4), %eax
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; CHECK-NEXT: leal (,%rsi,8), %eax
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; CHECK-NEXT: addq %rdi, %rax
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; CHECK-NEXT: retq
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%t4 = and i32 %t1, 8
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%sh = shl i32 %t4, 2
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%sh = shl i32 %t4, 3
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%t5 = zext i32 %sh to i64
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%t6 = add i64 %t5, %t0
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ret i64 %t6
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}
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define i64 @and_i32_zext_shl_add_i64_overshift(i64 %t0, i32 %t1) {
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; CHECK-LABEL: and_i32_zext_shl_add_i64_overshift:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
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; CHECK-NEXT: andl $8, %esi
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; CHECK-NEXT: shlq $4, %rsi
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; CHECK-NEXT: leaq (%rsi,%rdi), %rax
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; CHECK-NEXT: retq
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%t4 = and i32 %t1, 8
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%t5 = zext i32 %t4 to i64
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%sh = shl i64 %t5, 4
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%t6 = add i64 %sh, %t0
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ret i64 %t6
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}
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define i64 @and_i32_shl_zext_add_i64_overshift(i64 %t0, i32 %t1) {
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; CHECK-LABEL: and_i32_shl_zext_add_i64_overshift:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
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; CHECK-NEXT: andl $8, %esi
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; CHECK-NEXT: shll $4, %esi
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; CHECK-NEXT: leaq (%rsi,%rdi), %rax
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; CHECK-NEXT: retq
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%t4 = and i32 %t1, 8
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%sh = shl i32 %t4, 4
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%t5 = zext i32 %sh to i64
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%t6 = add i64 %t5, %t0
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ret i64 %t6
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}
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