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Teach the register allocator that movaps is also a move instruction
llvm-svn: 22451
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@ -28,7 +28,7 @@ bool X86InstrInfo::isMoveInstr(const MachineInstr& MI,
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unsigned& destReg) const {
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MachineOpCode oc = MI.getOpcode();
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if (oc == X86::MOV8rr || oc == X86::MOV16rr || oc == X86::MOV32rr ||
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oc == X86::FpMOV || oc == X86::MOVAPDrr) {
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oc == X86::FpMOV || oc == X86::MOVAPDrr || oc == X86::MOVAPSrr) {
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assert(MI.getNumOperands() == 2 &&
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MI.getOperand(0).isRegister() &&
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MI.getOperand(1).isRegister() &&
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