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Remove the -early-coalescing option
llvm-svn: 89240
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e37121e326
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7a31251441
@ -60,9 +60,6 @@ namespace llvm {
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typedef DenseMap<unsigned, LiveInterval*> Reg2IntervalMap;
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Reg2IntervalMap r2iMap_;
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/// phiJoinCopies - Copy instructions which are PHI joins.
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SmallVector<MachineInstr*, 16> phiJoinCopies;
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/// allocatableRegs_ - A bit vector of allocatable registers.
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BitVector allocatableRegs_;
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@ -278,13 +275,6 @@ namespace llvm {
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/// computeIntervals - Compute live intervals.
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void computeIntervals();
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bool isSafeAndProfitableToCoalesce(LiveInterval &DstInt,
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LiveInterval &SrcInt,
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SmallVector<MachineInstr*,16> &IdentCopies,
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SmallVector<MachineInstr*,16> &OtherCopies);
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void performEarlyCoalescing();
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/// handleRegisterDef - update intervals for a register def
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/// (calls handlePhysicalRegisterDef and
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/// handleVirtualRegisterDef)
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@ -53,16 +53,9 @@ static cl::opt<bool> DisableReMat("disable-rematerialization",
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static cl::opt<bool> EnableFastSpilling("fast-spill",
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cl::init(false), cl::Hidden);
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static cl::opt<bool> EarlyCoalescing("early-coalescing",
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cl::init(false), cl::Hidden);
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static cl::opt<int> CoalescingLimit("early-coalescing-limit",
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cl::init(-1), cl::Hidden);
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STATISTIC(numIntervals , "Number of original intervals");
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STATISTIC(numFolds , "Number of loads/stores folded into instructions");
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STATISTIC(numSplits , "Number of intervals split");
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STATISTIC(numCoalescing, "Number of early coalescing performed");
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char LiveIntervals::ID = 0;
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static RegisterPass<LiveIntervals> X("liveintervals", "Live Interval Analysis");
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@ -96,7 +89,6 @@ void LiveIntervals::releaseMemory() {
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delete I->second;
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r2iMap_.clear();
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phiJoinCopies.clear();
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// Release VNInfo memroy regions after all VNInfo objects are dtor'd.
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VNInfoAllocator.Reset();
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@ -121,7 +113,6 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
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allocatableRegs_ = tri_->getAllocatableSet(fn);
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computeIntervals();
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performEarlyCoalescing();
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numIntervals += getNumIntervals();
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@ -409,7 +400,6 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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// Remove the old range that we now know has an incorrect number.
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VNInfo *VNI = interval.getValNumInfo(0);
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MachineInstr *Killer = vi.Kills[0];
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phiJoinCopies.push_back(Killer);
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SlotIndex Start = getMBBStartIdx(Killer->getParent());
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SlotIndex End = getInstructionIndex(Killer).getDefIndex();
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DEBUG({
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@ -653,133 +643,6 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
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DEBUG(errs() << " +" << LR << '\n');
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}
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bool LiveIntervals::
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isSafeAndProfitableToCoalesce(LiveInterval &DstInt,
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LiveInterval &SrcInt,
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SmallVector<MachineInstr*,16> &IdentCopies,
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SmallVector<MachineInstr*,16> &OtherCopies) {
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unsigned NumIdent = 0;
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for (MachineRegisterInfo::def_iterator ri = mri_->def_begin(SrcInt.reg),
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re = mri_->def_end(); ri != re; ++ri) {
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MachineInstr *MI = &*ri;
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unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
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if (!tii_->isMoveInstr(*MI, SrcReg, DstReg, SrcSubReg, DstSubReg))
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return false;
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if (SrcReg != DstInt.reg) {
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// Non-identity copy - we cannot handle overlapping intervals
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if (DstInt.liveAt(getInstructionIndex(MI)))
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return false;
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OtherCopies.push_back(MI);
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} else {
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IdentCopies.push_back(MI);
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++NumIdent;
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}
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}
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return IdentCopies.size() > OtherCopies.size();
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}
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void LiveIntervals::performEarlyCoalescing() {
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if (!EarlyCoalescing)
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return;
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/// Perform early coalescing: eliminate copies which feed into phi joins
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/// and whose sources are defined by the phi joins.
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for (unsigned i = 0, e = phiJoinCopies.size(); i != e; ++i) {
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MachineInstr *Join = phiJoinCopies[i];
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if (CoalescingLimit != -1 && (int)numCoalescing == CoalescingLimit)
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break;
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unsigned PHISrc, PHIDst, SrcSubReg, DstSubReg;
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bool isMove= tii_->isMoveInstr(*Join, PHISrc, PHIDst, SrcSubReg, DstSubReg);
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#ifndef NDEBUG
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assert(isMove && "PHI join instruction must be a move!");
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#else
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isMove = isMove;
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#endif
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LiveInterval &DstInt = getInterval(PHIDst);
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LiveInterval &SrcInt = getInterval(PHISrc);
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SmallVector<MachineInstr*, 16> IdentCopies;
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SmallVector<MachineInstr*, 16> OtherCopies;
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if (!isSafeAndProfitableToCoalesce(DstInt, SrcInt,
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IdentCopies, OtherCopies))
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continue;
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DEBUG(errs() << "PHI Join: " << *Join);
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assert(DstInt.containsOneValue() && "PHI join should have just one val#!");
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assert(std::distance(mri_->use_begin(PHISrc), mri_->use_end()) == 1 &&
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"PHI join src should not be used elsewhere");
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VNInfo *VNI = DstInt.getValNumInfo(0);
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// Change the non-identity copies to directly target the phi destination.
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for (unsigned i = 0, e = OtherCopies.size(); i != e; ++i) {
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MachineInstr *PHICopy = OtherCopies[i];
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SlotIndex MIIndex = getInstructionIndex(PHICopy);
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DEBUG(errs() << "Moving: " << MIIndex << ' ' << *PHICopy);
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SlotIndex DefIndex = MIIndex.getDefIndex();
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LiveRange *SLR = SrcInt.getLiveRangeContaining(DefIndex);
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SlotIndex StartIndex = SLR->start;
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SlotIndex EndIndex = SLR->end;
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// Delete val# defined by the now identity copy and add the range from
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// beginning of the mbb to the end of the range.
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SrcInt.removeValNo(SLR->valno);
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DEBUG(errs() << " added range [" << StartIndex << ','
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<< EndIndex << "] to reg" << DstInt.reg << '\n');
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assert (!DstInt.liveAt(StartIndex) && "Cannot coalesce when dst live!");
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VNInfo *NewVNI = DstInt.getNextValue(DefIndex, PHICopy, true,
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VNInfoAllocator);
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NewVNI->setHasPHIKill(true);
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DstInt.addRange(LiveRange(StartIndex, EndIndex, NewVNI));
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for (unsigned j = 0, ee = PHICopy->getNumOperands(); j != ee; ++j) {
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MachineOperand &MO = PHICopy->getOperand(j);
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if (!MO.isReg() || MO.getReg() != PHISrc)
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continue;
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MO.setReg(PHIDst);
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}
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}
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// Now let's eliminate all the would-be identity copies.
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for (unsigned i = 0, e = IdentCopies.size(); i != e; ++i) {
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MachineInstr *PHICopy = IdentCopies[i];
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DEBUG(errs() << "Coalescing: " << *PHICopy);
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SlotIndex MIIndex = getInstructionIndex(PHICopy);
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SlotIndex DefIndex = MIIndex.getDefIndex();
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LiveRange *SLR = SrcInt.getLiveRangeContaining(DefIndex);
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SlotIndex StartIndex = SLR->start;
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SlotIndex EndIndex = SLR->end;
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// Delete val# defined by the now identity copy and add the range from
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// beginning of the mbb to the end of the range.
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SrcInt.removeValNo(SLR->valno);
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RemoveMachineInstrFromMaps(PHICopy);
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PHICopy->eraseFromParent();
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DEBUG(errs() << " added range [" << StartIndex << ','
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<< EndIndex << "] to reg" << DstInt.reg << '\n');
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DstInt.addRange(LiveRange(StartIndex, EndIndex, VNI));
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}
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// Remove the phi join and update the phi block liveness.
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SlotIndex MIIndex = getInstructionIndex(Join);
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SlotIndex UseIndex = MIIndex.getUseIndex();
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SlotIndex DefIndex = MIIndex.getDefIndex();
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LiveRange *SLR = SrcInt.getLiveRangeContaining(UseIndex);
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LiveRange *DLR = DstInt.getLiveRangeContaining(DefIndex);
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DLR->valno->setCopy(0);
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DLR->valno->setIsDefAccurate(false);
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DstInt.addRange(LiveRange(SLR->start, SLR->end, DLR->valno));
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SrcInt.removeRange(SLR->start, SLR->end);
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assert(SrcInt.empty());
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removeInterval(PHISrc);
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RemoveMachineInstrFromMaps(Join);
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Join->eraseFromParent();
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++numCoalescing;
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}
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}
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/// computeIntervals - computes the live intervals for virtual
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/// registers. for some ordering of the machine instructions [1,N] a
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/// live interval is an interval [i, j) where 1 <= i <= j < N for
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