RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-20 19:42:54 +02:00
Code Issues Projects Releases Wiki Activity

[X86] Do not assume "ri" instructions always have an immediate operand

Browse Source 
The second operand of an "ri" instruction may be an immediate, but it may
also be a globalvariable, so we should make any assumptions.

This fixes PR31271.

Differential Revision: https://reviews.llvm.org/D27481

llvm-svn: 288964
This commit is contained in:
Michael Kuperstein 2016-12-07 19:29:18 +00:00
parent ac76c41ccf
commit 7a552839e3
3 changed files with 28 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
lib/Target/X86/X86InstrBuilder.h
View File

@ -145,6 +145,11 @@ addOffset(const MachineInstrBuilder &MIB, int Offset) {
return MIB.addImm(1).addReg(0).addImm(Offset).addReg(0);
}
static inline const MachineInstrBuilder &
addOffset(const MachineInstrBuilder &MIB, const MachineOperand& Offset) {
return MIB.addImm(1).addReg(0).addOperand(Offset).addReg(0);
}
/// addRegOffset - This function is used to add a memory reference of the form
/// [Reg + Offset], i.e., one with no scale or index, but with a
/// displacement. An example is: DWORD PTR [EAX + 4].

6
lib/Target/X86/X86InstrInfo.cpp
View File

@ -3878,7 +3878,7 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
NewMI = addOffset(BuildMI(MF, MI.getDebugLoc(), get(X86::LEA64r))
.addOperand(Dest)
.addOperand(Src),
MI.getOperand(2).getImm());
MI.getOperand(2));
break;
case X86::ADD32ri:
case X86::ADD32ri8:
@ -3901,7 +3901,7 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
if (ImplicitOp.getReg() != 0)
MIB.addOperand(ImplicitOp);
NewMI = addOffset(MIB, MI.getOperand(2).getImm());
NewMI = addOffset(MIB, MI.getOperand(2));
break;
}
case X86::ADD16ri:
@ -3915,7 +3915,7 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
NewMI = addOffset(BuildMI(MF, MI.getDebugLoc(), get(X86::LEA16r))
.addOperand(Dest)
.addOperand(Src),
MI.getOperand(2).getImm());
MI.getOperand(2));
break;
}

20
test/CodeGen/X86/pr31271.ll Normal file
View File

@ -0,0 +1,20 @@
; RUN: llc -mtriple=i386-unknown-linux-gnu < %s | FileCheck %s
@c = external global [1 x i32], align 4
; CHECK-LABEL: fn1
; CHECK: leal c(%eax), %ecx
define void @fn1(i32 %k) {
%g = getelementptr inbounds [1 x i32], [1 x i32]* @c, i32 0, i32 %k
%cmp = icmp ne i32* undef, %g
%z = zext i1 %cmp to i32
store i32 %z, i32* undef, align 4
%cmp2 = icmp eq i32* %g, null
br i1 %cmp2, label %u, label %r
u:
unreachable
r:
ret void
}